JTAG disabled in silicon revision?


I have custom hardware with a K1 SoC, on which JTAG doesn’t work, TAPs fail to enumerate and openocd reports Error: Invalid ACK (0) in DAP response.

I have a logic analyser attached to the bus, and a Jetson TK1 development board for comparison.

On the target, APB_MISC_PP_CONFIG_CTL_0 bits 6 and 7 are set, so JTAG isn’t disabled in software as far as i know.

The Jetson works with these bits set, but when un-setting them it doesn’t. The resulting logic trace looks similar to the trace of the target system. Communication is stopped after a short period of time.

Are there silicon revisions where JTAG is disabled, or is there something i’m missing that might be preventing JTAG from working?

Many thanks,

Hi, did you check the JTAG and strapping parts of design guide? Is there any difference between your board and dev kit board? Generally the JTAG is not disabled, what’s your chip version number?

Also please try below command line:

$ sudo cat /sys/devices/platform/tegra-fuse/jtag_disable

On my L4T (R28.2-DP), the sysfs node is named a bit differently:

cat /sys/devices/platform/tegra-fuse/arm_jtag_disable

[EDIT: Sorry I missed this was for TK1… My case was on TX2]


# cat /sys/devices/platform/tegra-fuse/jtag_disable

Is there some way i can check the chip version number?

As far as i know, the board is a direct copy of the reference design. I think, however that all the JTAG lines are pulled down on this board.


This shows the jtag is not disabled and is not related to chip version. Not sure why it failed on your board, please compare your design with reference board to see if any difference will cause this.

Just a thought…some of the components related to JTAG are listed, but noted as not installed. Your design might have missed options on component installed or not under debug/JTAG.