L4T R34.1 on AGX cannot boot due to header magic number invalid

Hi,
with R34.1 overlay released on May 12th, finally I can flash the AGX xavier image in to module on my carrier board, but boot up failed with the message below:

[0000.305] I> Welcome to MB2(TBoot-BPMP) (version: default.t194-mobile-f46b9673)
[0000.306] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.307] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.308] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.313] W> device prod register failed
[0000.317] I> Boot_device: SDMMC_BOOT instance: 3
[0000.321] I> sdmmc-3 params source = boot args
[0000.327] I> sdmmc-3 params source = boot args
[0000.330] I> sdmmc bdev is already initialized
[0000.338] I> Found 21 partitions in SDMMC_BOOT (instance 3)
[0000.345] I> Found 41 partitions in SDMMC_USER (instance 3)
[0000.346] W> No valid slot number is found in scratch register
[0000.351] W> Return default slot: _a
[0000.354] I> Active Boot chain : 0
[0000.367] E> HeaderMagic Invalid
[0000.367] I> 馃?馃?馃?馃?馃?馃?馃?馃? execution failed
[0000.368] I> 馃?馃?馃?馃?馃?馃?馃?馃? execution failed
[0000.372] E> Top caller module: LOADER, error module: LOADER, reason: 0x02, aux_info: 0x00
[0000.380] I> AB warm reset

seems the flash tool and MB2 used the different SBK key, so the header magic generated by flash tool cannot be recognized during boot up.
any help or hint are highly appreciated.
Thanks.
Willian

Hello,

So this AGX board is a fused one?

No, this AGX module never fused before. it works well with R32.6.1, and if I flash the same AGX module with JP5.0 SDK manager on devkit (it’s l4t R32.7 image), it can boot up normally.

Hi,

I think there is a typo. JP5.0 is 34.1. JP4.6.1 is 32.7.

Yes, you are right. I flash the same AGX module with JP5.0 SDK manager on devkit (it’s l4t R34.1 image), it can boot up normally. sorry for misleading.
with this Header magic invalid, where should I look up to?

Please attach the full log. I don’t think this is related to SBK since your module does not enable secure boot.

Hi, here is the full log from debug UART after power up, it repeat endlessly.

[0000.055] W> RATCHET: MB1 binary ratchet value 4 is larger than ratchet level 2 from HW fuses.
[0000.063] I> MB1 (prd-version: 2.2.0.0-t194-41334769-3540ffaa)
[0000.068] I> Boot-mode: Coldboot
[0000.071] I> Platform: Silicon
[0000.074] I> Chip revision : A02P
[0000.077] I> Bootrom patch version : 15 (correctly patched)
[0000.082] I> ATE fuse revision : 0x200
[0000.086] I> Ram repair fuse : 0x0
[0000.089] I> Ram Code : 0x2
[0000.091] I> rst_source: 0xb, rst_level: 0x1
[0000.096] I> Boot-device: SDMMC (instance: 3)
[0000.112] I> sdmmc DDR50 mode
[0000.116] I> Boot chain mechanism: A/B
[0000.120] I> Current Boot-Chain Slot: 0
[0000.123] W> No valid slot number is found in scratch register
[0000.129] W> Return default slot: _a
[0000.134] W> PROD_CONFIG: device prod data is empty in MB1 BCT.
[0000.139] I> Temperature = 36000
[0000.142] W> Skipping boost for clk: BPMP_CPU_NIC
[0000.147] W> Skipping boost for clk: BPMP_APB
[0000.151] W> Skipping boost for clk: AXI_CBB
[0000.155] W> Skipping boost for clk: AON_CPU_NIC
[0000.159] W> Skipping boost for clk: CAN1
[0000.163] W> Skipping boost for clk: CAN2
[0000.167] I> Boot-device: SDMMC (instance: 3)
[0000.176] I> Sdmmc: HS400 mode enabled
[0000.180] I> Non-ECC region[0]: Start:0x80000000, End:0x100000000
[0000.187] W> Thermal config not found in BCT
[0000.195] W> MEMIO rail config not found in BCT
[0000.217] I> sdmmc bdev is already initialized
[0000.262] W> Platform config not found in BCT
[0000.296] I> MB1 done

\0?鄊ain enter
SPE VERSION #: R01.00.18 Created: Jan 29 2021 @ 14:18:27
HW Function test
Start Scheduler.
in late init
?
[0000.305] I> Welcome to MB2(TBoot-BPMP) (version: default.t194-mobile-f46b9673)
[0000.306] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.306] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.307] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.313] W> device prod register failed
[0000.316] I> Boot_device: SDMMC_BOOT instance: 3
[0000.321] I> sdmmc-3 params source = boot args
[0000.326] I> sdmmc-3 params source = boot args
[0000.329] I> sdmmc bdev is already initialized
[0000.338] I> Found 21 partitions in SDMMC_BOOT (instance 3)
[0000.344] I> Found 41 partitions in SDMMC_USER (instance 3)
[0000.345] W> No valid slot number is found in scratch register
[0000.350] W> Return default slot: _a
[0000.354] I> Active Boot chain : 0
[0000.366] E> HeaderMagic Invalid
[0000.367] I> 馃?馃?馃?馃?馃?馃?馃?馃? execution failed
[0000.367] I> 馃?馃?馃?馃?馃?馃?馃?馃? execution failed
[0000.371] E> Top caller module: LOADER, error module: LOADER, reason: 0x02, aux_info: 0x00
[0000.380] I> AB warm reset
\0\0

Hi Wayne,
FYI, I attached 3 files here.
Host_JP50_FLASHTOOL_LOG_20220513.txt // the flash tool output log in Linux host terminal
JP50_Flash_and_boot_UART_log_AGX_on_carrierboard //the uart log from AGX on carrier board during flash and boot up
JP50_SDKMGR_Image_Carrierboard_UART_log.txt // for comparison, this file is the log from a AGX module flashed on devkit with SDK manager, then move to a carrier board to boot up. it cannot boot up due to eeprom reading issue but no header magic issue.

hope these can help.
Thanks.
Willian
Host_JP50_FLASHTOOL_LOG_20220513.txt (62.6 KB)
JP50_Flash_and_boot_UART_log_AGX_on_carrierboard.txt (50.2 KB)
JP50_SDKMGR_Image_Carrierboard_UART_log.txt (11.0 KB)

Hi,

What will be the result if you apply the previous workaround we shared to flash + boot with old jp5.0DP release?

I mean set cvb/cvm eeprom read size to 0 in mb2 config. Will you also hit this issue?

Also, please clarify how you applied the overlay. So far we didn’t hear any other users telling they hit HeaderMagic Invalid.

Hi,
here is the overlay readme:

Process to use overlay:

  1. Download the overlay (overlay_34.1_Xavier_MB2.tbz2) to the same directory where JP 5.0 /34.1 developer preview BSP is downloaded to on the Linux host.

  2. untar BSP and sample file system to set up by using the following commands -
    tar xf Jetson_Linux_R34.1.0_aarch64.tbz2
    cd Linux_for_Tegra/rootfs/
    sudo tar xpf …/…/Tegra_Linux_Sample-Root-Filesystem_R34.1.0_aarch64

  3. Replace the binaries in the BSP with those from the overlay.
    cd …/…
    tar xf overlay_34.1_Xavier_MB2.tbz2

  4. Continue with the steps to flash the board.
    cd Linux_for_Tegra
    sudo ./apply_binaries.sh
    sudo ./flash.sh ${BOARD} mmcblk0p1

    I set up a source compile environment already so I thought no need to untar the Jetson_Linux_R34.1.0_aarch64.tbz2 and Tegra_Linux_Sample-Root-Filesystem_R34.1.0_aarch64. That means step 2 was skipped.
    step 1,3,4 was followed. and I rebuild the dtb before flash the image.
    will this trigger the issue?
    Thanks.
    Willian

Can you not use your dtb but use the original one first?

Hi Wayne,
seems there was something wrong with my previous kernel compile environment, I followed the overlay readme process it was ok, and I rebuild the kernel and dtb, everything fine now, sorry for disturbing.
Willian

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