I am using the flex parser(verilog.lex file) to parse a data file. The parsed data is sent to gpu for computation through fire_host.cu. This is my makefile:
Please note that lex.yy.c was compiling perfectly with gcc for the serial version of the same application.
all: output
output: lex.yy.c fire_host.cu
nvcc lex.yy.c fire_host.cu -o ESFF
lex.yy.c: verilog.lex
flex verilog.lex
clean:
rm -o ESFF
However, on compiling I get an error:
lex.yy.c(681): error: linkage specification is incompatible with previous “yywrap”
verilog.lex(23): here
line 681 in lex.yy.c corresponds to :
#ifdef __cplusplus
static int yyinput (void );
#else
static int input (void );
#endif
Please Help. I spent a lot of time on this but without any success !!!