M.2 Key B CONFIG_X signals (CONFIG_0, CONFIG_1, etc)

We’re working on a custom Orin NX carrier, and plan to use a M.2 Key B to support A) a LTE module (Quectel or similar) and B) an NPU accelerator for development.

In reading about the Key B pinout, I came across the signal 4 configuration signals CONFIG_0 (pin 21) /CONFIG_1 (pin 69)/CONFIG_2 (pin 75) /CONFIG_3 (pin 1) that are intended to be read by the SOM to identify the pinout configuration (from this Congatec document, p9, Section 3.1.1), table is pasted below.

From the Orin NX perspective, do I need to connect these signals to a specific set of pins? If I can route them to arbitrary, unused GPIO pins, will I need to modify the device tree and/or configure the system drivers to get the correct configuration based on what’s connected?

CONFIG_0 CONFIG_1 CONFIG_2 CONFIG_3 Host Interface
0 0 0 0 SSD - SATA
0 1 0 0 SSD - PCIe
0 0 1 0 WWAN - PCIe (Port Configuration 0*)
0 1 1 0 WWAN – PCIe (Port Configuration 1*)
0 0 0 1 WWAN – PCIe, USB3.1 Gen1 (Port Configuration 0*)
0 1 0 1 WWAN – PCIe, USB3.1 Gen1 (Port Configuration 1*)
0 0 1 1 WWAN – PCIe, USB3.1 Gen1 (Port Configuration 2*)
0 1 1 1 WWAN – PCIe, USB3.1 Gen1 (Port Configuration 3*)
1 0 0 0 WWAN – SSIC (Port Configuration 0*)
1 1 0 0 WWAN – SSIC (Port Configuration 1*)
1 0 1 0 WWAN – SSIC (Port Configuration 2*)
1 1 1 0 WWAN – SSIC (Port Configuration 3*)
1 0 0 1 WWAN – PCIe (Port Configuration 2*)
1 1 0 1 WWAN – PCIe (Port Configuration 3*)
1 0 1 1 WWAN – PCIe, USB3.1 Gen1 (vendor defined)
1 1 1 1 No Add-in Card Present

I am not quite sure about what does this table tries to tell here. Could you elaborate more?

The table is from the M.2 Key B pinout. See the attached image, pins 21, 69, 75, 1.

My question is about which pins should these be connected to on the Orin NX. Should they be on any unused GPIO? Then also, I need guidance on how to configure the OS/software to use the correct driver, based on the state of these signals? i.e. if I connect a SATA drive, the state of the CONFIG[3..0] would be 0b0000, if I connect a PCIe SSD, then I’d expect to see 0b0100, etc.

CONFIG_0/1/2/3 will need to be connected to any unused GPIOs keeping in mind the voltage signal levels required (like 1.8V or 3.3V) and configured as Input on Orin NX module. Your SW will need to read these GPIOs as early as possible in your boot/initialization sequence and then configure the interfaces on Orin NX to align with your intended use.

Hi,

Just some other notes here. We don’t provide any existing driver to do such “switch” configuration things that you want to do here.

thank you for the answers. I’ve also asked an LLM and in summary this is what it said:

CONFIG_X pins are “legacy” functions that older Mini-PCIE implementations provided, and were typically used by the BIOS/firmware on the host device, while Jetsons rely on pinmuxing and Device Tree settings.

Also worth pointing out that Linux doesn’t rely on the CONFIG_X pins for device identification. Instead, it uses standard bus enumeration mechanisms.

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