M.2 Key M on the AGX Orin Devkit connection

In the AGX Orin Devkit the M.2 Key M connects to the UPHY 10-11 and 4-5.
It’s a conflict with the config table (Jetson_AGX_Orin_Jetson_AGX_Xavier_IF_Comparison_Migration_DA-10655-001_v1.0.pdf page 14).
According to this there is no PCIe on UPHY 4-5.
Can you explain this conflict?
I connect, on my design, the M.2 Key M, to UPHY 12-15.
Is it correct?

Please refer to the pin name, not the signal name in schematic. UPHY0_4 is UPHY_22, UPHY0_5 is UPHY_23.

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