Manual Error for Time Registers

Hi,
It seems the TRM for the time registers has an error (page 5705).
This is what it says:
TKE_TOP_SHARED_TKETSC0_0
Value of Local TSC counter, synchronized across SOC
TKE_TOP_SHARED_TKETSC1_0
Value of Master TSC counter, synchronized across SOC

I think it should be:
TKE_TOP_SHARED_TKETSC0_0
Value of Master TSC counter, synchronized across SOC
TKE_TOP_SHARED_TKETSC1_0
Value of Master TSC counter, synchronized across SOC

Is that a correct understanding?

No, the TRM is correct.

As I have seen these two registers used on the forums as well as how I have read them in the past

TKE_TOP_SHARED_TKETSC0_0 is bits 0:31
TKE_TOP_SHARED_TKETSC1_0 is bits 55:32
of the overall TSC.

So shouldn’t either they both be master or both local?

The TRM is correct.

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