I have a two part question:
1. Is there anyway to find the pipeline depth of each unit. The critical thing which I would like to find is whether the shared memory accesses are pipelined 2. I see that Nvidia documentation contains the assembly instruction set. However I dont see the allowed srcs/dests per instruction. For eg. there is MOV instruction. Will it allow to move directly from Global to memory and Shared memory? Is there any documentation of this kind?