Mcp2518fd cannot send/recv can message

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
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1

Issue Description
I am trying to bring up the MCP2518FD SPI-to-CAN transceiver on the Orin platform. Currently, the device has been successfully enumerated, and the CAN node has also appeared normally. However, I cannot send or receive external CAN messages using cansend or candump. How can I troubleshoot this issue?

this is my dts file

		clocks {
			clk40m: mcp2518fd_osc {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <40000000>;
				clock-accuracy = <100>;
			};
		};
			can@0 {
				compatible = "microchip,mcp2518fd";
				status = "okay";
				reg = <0x0>;
				spi-max-frequency = <10000000>;
				clocks = <&clk40m>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA234_MAIN_GPIO(R, 0) IRQ_TYPE_LEVEL_LOW>;
				vdd-supply = <&vdd_5v0_sys>;
				xceiver-supply = <&vdd_5v0_sys>;
				controller-data {
					nvidia,enable-hw-based-cs;
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x0>;
				};
			};

			can@1 {
				compatible = "microchip,mcp2518fd";
				status = "disabled";
				reg = <0x1>;
				spi-max-frequency = <10000000>;
				clocks = <&clk40m>;
				interrupt-parent = <&gpio>;
				interrupts = <TEGRA234_MAIN_GPIO(N, 1) IRQ_TYPE_LEVEL_LOW>;
				vdd-supply = <&vdd_5v0_sys>;
				xceiver-supply = <&vdd_5v0_sys>;
				controller-data {
					nvidia,enable-hw-based-cs;
					nvidia,cs-setup-clk-count = <0x1e>;
					nvidia,cs-hold-clk-count = <0x1e>;
					nvidia,rx-clk-tap-delay = <0x1f>;
					nvidia,tx-clk-tap-delay = <0x0>;
				};
			};

Error String
< Please provide just the error messages here >

Logs
[ 167.332351] irq: IRQ290: trimming hierarchy from :bus@0:pmc@c360000
[ 167.333478] spi_master spi0: will run message pump with realtime priority
[ 167.342897] mcp251xfd spi0.0 can2: MCP2518FD rev0.0 (-RX_INT -MAB_NO_WARN +CRC_REG +CRC_RX +CRC_TX +ECC -HD c:40.00MHz m:10.00MHz r:10.00MHz e:0.00MHz) successfully initialized.
[ 167.343143] irq: IRQ291: trimming hierarchy from :bus@0:pmc@c360000
[ 167.353255] mcp251xfd spi0.1 can3: MCP2518FD rev0.0 (-RX_INT -MAB_NO_WARN +CRC_REG +CRC_RX +CRC_TX +ECC -HD c:40.00MHz m:10.00MHz r:10.00MHz e:0.00MHz) successfully initialized.
[ 188.972040] mttcan c310000.mttcan can0: Bitrate set
[ 188.974872] mttcan c320000.mttcan can1: Bitrate set
[ 189.000566] mttcan_controller_config: ctrlmode 0
[ 189.000592] mttcan c310000.mttcan can0: Bitrate set
[ 189.000722] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready
[ 189.002446] mttcan_controller_config: ctrlmode 0
[ 189.002466] mttcan c320000.mttcan can1: Bitrate set
[ 190.015814] IPv6: ADDRCONF(NETDEV_CHANGE): can1: link becomes ready
[ 190.015887] IPv6: ADDRCONF(NETDEV_CHANGE): can2: link becomes ready
[ 190.016051] IPv6: ADDRCONF(NETDEV_CHANGE): can3: link becomes ready
[ 215.588398] can: controller area network core

the default can0 and can1 are working well ，i use Jetpack 6.0(rev 2) version , change the dts file and insmod the mcp2518fd.ko to test

has any tips to help ?
I have searched all the forums on this topic, but the issue remains unresolved.

2

Moving to Jetson AGX Orin - NVIDIA Developer Forums for support.

4

Hi duztfeng,

Are you using the devkit or custom board for AGX Orin?
What’s the Jetpack version in use?

It seems you configured 2 MCP2518 modules on SPI0 interface with CS0 and CS1 respectively.

Could you share the block diagram of the connections?
Have you verified the SPI loopback test before porting MCP2518FD module?

6

i use the devkit agx orin , and use 40pin interface to connect own custom board,

the spi1 has 2 mcp2518fd， the cs signal and spi signal work well.

jetpack version is 6.0(rev 2)

I have measured the SPI signals with an oscilloscope, and everything is normal.

But I found that the agx orin cannot trigger the INT interrupt, or there is an abnormal interrupt on one of the pin feet. The interrupt pins are HDR40_PIN13 and HDR40_PIN15.
I have tried to configure these two pins as input pins, are there any other configurations needed?

				soc_gpio37_pr0 {
					nvidia,pins = "soc_gpio37_pr0";
					nvidia,function = "gp";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
					nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
					nvidia,lpdr = <TEGRA_PIN_DISABLE>;
				};

				soc_gpio39_pn1 {
					nvidia,pins = "soc_gpio39_pn1";
					nvidia,function = "rsvd1";
					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
					nvidia,tristate = <TEGRA_PIN_DISABLE>;
					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
					nvidia,lpdr = <TEGRA_PIN_DISABLE>;
				};

cat /proc/interrupts
→
290: 0 0 0 0 0 0 0 0 2200000.gpio 108 Level spi0.0
291: 100001 0 0 0 0 0 0 0 2200000.gpio 85 Level spi0.1

7

There is no update from you for a period, assuming this is not an issue anymore.
Hence, we are closing this topic. If need further support, please open a new one.
Thanks

Sorry for the late response.
Is this still an issue to support? Any result can be shared?