Memory address in dts-files

I want to bring up my spidev devices.

Currently, I do not understand, how the memory address for example c260000 (spi@c260000)
is linked to witch SPI-pin’s or devices.

In the end, I need to know, how is the address linked to SPI io’s?


In the Technical Reference Manual you will find that there is a base address to each controller. The address you see is the base address. Go here, check TX2 in “Product”, and put “technical” in the search term…you’ll want the Parker Series TRM:

Hi, thanks, that is what I’m looking for.
But to be honest, special for SPI it is confusing…

In the technical reference, NVIDIA is speaking about 3 SPI.
From the documentation…

SPI1 					0x03210000	0x0321ffff		arspi.h
SPI2	AON_CLUSTER		0x0c260000	0x0c26ffff		arspi.h
SPI3 					0x03230000	0x0323ffff		arspi.h
SPI4 					0x03240000	0x0324ffff		arspi.h

I’m a little bit confused, because in the OEM-Design guide, also only 3 SPI’s.
SPI0 = Display connector with CS0
SPI1 = Extension Header with CS0
SPI2 = Camera Conns. with CS0 + CS1

So, how can I bring that in relation together ?

I haven’t worked on SPI so I don’t know details. One thing you will find though is that each new generation of Tegra SoC tends to add more controllers in order to add more of that function, e.g., instead of replacing a GPIO controller with more lines of I/O newer SoC designs will add a new GPIO controller with the same exact specifications, but at a different base address…prior GPIO would remain at the same address using the same drivers…newer GPIO would be described exactly when reading specifications of an older GPIO so long as the new base address is used correctly.

I do not know the history of SPI, someone else will need to clarify, but perhaps you are seeing a mix of older software with three controllers and newer software with an added base address (since the Parker Series TRM covers both a TX1 and TX2 I could see the possibility that the number of controllers depends on whether you are looking at a TX1 or a TX2…I have not verified this, it’s just conjecture).