MiniMax-M3-AWQ on 4× GB10, fp8 KV, 262k context, adaptive reasoning, ~30 tok/s

Note (2026-04-30): NVIDIA later clarified on the developer forum that this instruction actually does exist on GB10 — it requires the sm_121a target rather than sm_121. The observation in the original article was real (under sm_121 it’s missing), but attributing it to “no circuit exists” was wrong.

The moment I read that note on the same post, I stopped reading it myself and sent Fable to read it.
… And the epilogue confirms the conclusion is now stale: the same blog’s later posts show NVFP4 beating FP8 by ~1.5× for single-stream decode on a dense model (as a bandwidth/compression win) and NVFP4 W4A4 hitting 67 vs 52 tok/s against FP8 on an MoE once CUDA graphs were enabled. [Benchmark] NVFP4 W4A4 beats FP8 on a DGX Spark MoE: 67 vs 52 tok/s once CUDA graphs fire — ai-muninn