MIPI Lane swapping

Autonomous Machines Jetson & Embedded Systems Jetson Xavier NX
1

We are trying to avoid MIPI lane crossing in PCB layout, e.g., we’d like to swap cam4 lane order from 3, 1, 0, 2 to 0, 1, 2, 3. I did not find lane swapping option in DTB.
Is this possible? If yes, how should I do it?
Thanks in advance.

3

Below is the lane swizzle configuration from TRM.
You can try to configure from csi5_fops.c to try.

LANE_SWIZZLE_CTRL:
Polarity Swizzle control for Bricks. Valid in both CPHY and DPHY modes
00000 A0 A1 B0 B1 → A0 A1 B0 B1
00001 A0 A1 B0 B1 → A0 A1 B1 B0
00010 A0 A1 B0 B1 → A0 B0 B1 A1
00011 A0 A1 B0 B1 → A0 B0 A1 B1
00100 A0 A1 B0 B1 → A0 B1 A1 B0
00101 A0 A1 B0 B1 → A0 B1 B0 A1
00110 A0 A1 B0 B1 → A1 A0 B0 B1
00111 A0 A1 B0 B1 → A1 A0 B1 B0
01000 A0 A1 B0 B1 → A1 B0 B1 A0
01001 A0 A1 B0 B1 → A1 B0 A0 B1
01010 A0 A1 B0 B1 → A1 B1 A0 B0
01011 A0 A1 B0 B1 → A1 B1 B0 A0
01100 A0 A1 B0 B1 → B0 A1 A0 B1
01101 A0 A1 B0 B1 → B0 A1 B1 A0
01110 A0 A1 B0 B1 → B0 A0 B1 A1
01111 A0 A1 B0 B1 → B0 A0 A1 B1
10000 A0 A1 B0 B1 → B0 B1 A1 A0
10001 A0 A1 B0 B1 → B0 B1 A0 A1
10010 A0 A1 B0 B1 → B1 A1 B0 A0
10011 A0 A1 B0 B1 → B1 A1 A0 B0
10100 A0 A1 B0 B1 → B1 B0 A0 A1
10101 A0 A1 B0 B1 → B1 B0 A1 A0
10110 A0 A1 B0 B1 → B1 A0 A1 B0
10111 A0 A1 B0 B1 → B1 A0 B0 A1

4

@ShaneCCC,
This is very helpful. Does Xavier Series TRM also apply to Xavier NX? I could not find Xavier NX TRM.
Thanks

5

Yes, Xavier and Xavier NX are the same chip.

6

OK, Thanks

8

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