# mlx5/connectx-4 out of order packets w/ a single queue?

**URL:** <https://forums.developer.nvidia.com/t/mlx5-connectx-4-out-of-order-packets-w-a-single-queue/207501>\
**Category:** Mellanox OFED\
**Created:** [April 28, 2017, 5:29am UTC](https://forums.developer.nvidia.com/t/mlx5-connectx-4-out-of-order-packets-w-a-single-queue/207501 "2017-04-28T05:29:45Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![charles.myers](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@charles.myers](https://forums.developer.nvidia.com/u/charles.myers)\
**Post date:** [April 28, 2017, 5:29am UTC](https://forums.developer.nvidia.com/t/mlx5-connectx-4-out-of-order-packets-w-a-single-queue/207501/1 "2017-04-28T05:29:45Z")

</div>

Hi,

I am writing packet generation/analysis software using the ConnectX-4 (mlx5) DPDK driver.

With all other NICs I have tried (including ConnectX-3) when only a single queue on an interface is used

all packets are usually received in the order they are sent regardless of changing IP/MAC addresses

because RSS is not being used.

Is the ConnectX-4 doing RX flow classification/analysis all the time which would cause this?

Is there a way to turn it off?

I am using DPDK 16.11 with Mellanox 4.0-1.5.2.0 kernel drivers w/ linux 4.4 kernel in a VM running on QEMU/KVM w/ PCI passthru.

ConnectX-4 EN

Firmware: 12.18.2000

Board ID: MT\_2150110033

Attached is a simple program which reproduces the issue.

See the readme.txt file in the .tgz file for additional details and description of program.

I thought the issue might be caused by the WQ indirection in the DPDK driver so I modified the

DPDK mlx5 driver code to use a QP directly, but there are still out of order packet issues.

Any idea why this is occurring?

Thanks,

Charles

[mlx-ooo-test.tgz](https://forums.developer.nvidia.com/uploads/short-url/z0Qw5M3VVvVr6eghm5ahzn8TKvh.tgz) (20 KB)