NANO EMMC SPI signal seen on the scope is abnormal

After modify these files ,the nano can receive data by jump MOSI and MISO.

./hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
./hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi
./kernel/kernel-4.9/drivers/spi/spi-tegra114.c
./kernel/kernel-4.9/drivers/gpio/gpio-tegra.c
nvidia@nvidia:~$ cat /etc/nv_tegra_release | head -n 1
# R32 (release), REVISION: 6.1, GCID: 27863751, BOARD: t210ref, EABI: aarch64, DATE: Mon Jul 26 19:20:30 UTC 2021

Howere, the signal seen on the scope is abnormal


BLUE: MOSI
YELLOW:SCK
How to make it work normally?
Thanks.

Any correct signal to compare?

(post deleted by author)


correct signal like this, it is generated by raspberrypi

any help?

@qgq1991
Could you share your modification here to review.

Thanks

gpio-tegra.c (21.8 KB)
spi-tegra114.c (59.2 KB)
tegra210-porg-gpio-p3448-0002-b00.dtsi (2.3 KB)
tegra210-porg-p3448-common.dtsi (21.8 KB)

diff -u ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c.bak ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c

$ diff -u ./hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi.bak ./hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
--- ./hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi.bak	2021-11-05 14:32:19.880802429 +0800
+++ ./hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi	2021-11-05 14:35:37.000000000 +0800
@@ -196,7 +196,8 @@
 	hdr40_spi1: spi@7000d400 { /* SPI 1 to 40 pin header */
 		status = "okay";
 		spi@0 {
-			compatible = "tegra-spidev";
+            status = "okay";
+			compatible = "spidev";
 			reg = <0x0>;
 			spi-max-frequency = <33000000>;
 			controller-data {
@@ -205,7 +206,8 @@
 			};
 		};
 		spi@1 {
-			compatible = "tegra-spidev";
+            status = "okay";
+			compatible = "spidev";
 			reg = <0x1>;
 			spi-max-frequency = <33000000>;
 			controller-data {
            
$ diff -u ./hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi.bak ./hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi
--- ./hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi.bak	2021-11-29 18:26:33.065072832 +0800
+++ ./hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi	2021-11-05 14:26:21.000000000 +0800
@@ -1,81 +1,90 @@
-/*This dtsi file was generated by T210_P3448_SKU2_pinmux.xlsm Revision: 17 */
-/*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- */
-
-#include <dt-bindings/gpio/tegra-gpio.h>
-
-/ {
-	gpio: gpio@6000d000 {
-		gpio-init-names = "default";
-		gpio-init-0 = <&gpio_default>;
-
-		gpio_default: default {
-			gpio-input = <
-				TEGRA_GPIO(BB, 0)
-				TEGRA_GPIO(B, 4)
-				TEGRA_GPIO(B, 5)
-				TEGRA_GPIO(B, 6)
-				TEGRA_GPIO(B, 7)
-				TEGRA_GPIO(DD, 0)
-				TEGRA_GPIO(E, 6)
-				TEGRA_GPIO(S, 5)
-				TEGRA_GPIO(A, 5)
-				TEGRA_GPIO(X, 4)
-				TEGRA_GPIO(X, 5)
-				TEGRA_GPIO(X, 6)
-				TEGRA_GPIO(Y, 1)
-				TEGRA_GPIO(Y, 2)
-				TEGRA_GPIO(V, 0)
-				TEGRA_GPIO(V, 1)
-				TEGRA_GPIO(Z, 0)
-				TEGRA_GPIO(Z, 2)
-				TEGRA_GPIO(J, 5)
-				TEGRA_GPIO(J, 6)
-				TEGRA_GPIO(J, 4)
-				TEGRA_GPIO(J, 7)
-				TEGRA_GPIO(G, 2)
-				TEGRA_GPIO(G, 3)
-				TEGRA_GPIO(C, 0)
-				TEGRA_GPIO(C, 1)
-				TEGRA_GPIO(C, 2)
-				TEGRA_GPIO(C, 3)
-				TEGRA_GPIO(C, 4)
-				TEGRA_GPIO(H, 2)
-				TEGRA_GPIO(H, 5)
-				TEGRA_GPIO(H, 6)
-				TEGRA_GPIO(CC, 4)
-				>;
-			gpio-output-low = <
-				TEGRA_GPIO(S, 7)
-				TEGRA_GPIO(T, 0)
-				TEGRA_GPIO(H, 0)
-				TEGRA_GPIO(H, 3)
-				TEGRA_GPIO(H, 4)
-				TEGRA_GPIO(H, 7)
-				TEGRA_GPIO(I, 0)
-				TEGRA_GPIO(I, 2)
-				>;
-			gpio-output-high = <
-				TEGRA_GPIO(A, 6)
-				TEGRA_GPIO(X, 3)
-				TEGRA_GPIO(I, 1)
-				TEGRA_GPIO(CC, 7)
-				>;
-		};
-	};
-};
+/*This dtsi file was generated by T210_P3448_SKU2_pinmux.xlsm Revision: 17 */
+/*
+ * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <dt-bindings/gpio/tegra-gpio.h>
+
+/ {
+	gpio: gpio@6000d000 {
+		gpio-init-names = "default";
+		gpio-init-0 = <&gpio_default>;
+
+		gpio_default: default {
+        	gpio-hog;
+            function;
+            gpios = <
+                TEGRA_GPIO(C, 0) 0 
+                TEGRA_GPIO(C, 1) 0 
+                TEGRA_GPIO(C, 2) 0 
+                TEGRA_GPIO(C, 3) 0
+                TEGRA_GPIO(C, 4) 0
+            >;
+			gpio-input = <
+				TEGRA_GPIO(BB, 0)
+				TEGRA_GPIO(B, 4)
+				TEGRA_GPIO(B, 5)
+				TEGRA_GPIO(B, 6)
+				TEGRA_GPIO(B, 7)
+				TEGRA_GPIO(DD, 0)
+				TEGRA_GPIO(E, 6)
+				TEGRA_GPIO(S, 5)
+				TEGRA_GPIO(A, 5)
+				TEGRA_GPIO(X, 4)
+				TEGRA_GPIO(X, 5)
+				TEGRA_GPIO(X, 6)
+				TEGRA_GPIO(Y, 1)
+				TEGRA_GPIO(Y, 2)
+				TEGRA_GPIO(V, 0)
+				TEGRA_GPIO(V, 1)
+				TEGRA_GPIO(Z, 0)
+				TEGRA_GPIO(Z, 2)
+				TEGRA_GPIO(J, 5)
+				TEGRA_GPIO(J, 6)
+				TEGRA_GPIO(J, 4)
+				TEGRA_GPIO(J, 7)
+				TEGRA_GPIO(G, 2)
+				TEGRA_GPIO(G, 3)
+				/*TEGRA_GPIO(C, 0)*/
+				/*TEGRA_GPIO(C, 1)*/
+				/*TEGRA_GPIO(C, 2)*/
+				/*TEGRA_GPIO(C, 3)*/
+				/*TEGRA_GPIO(C, 4)*/
+				TEGRA_GPIO(H, 2)
+				TEGRA_GPIO(H, 5)
+				TEGRA_GPIO(H, 6)
+				TEGRA_GPIO(CC, 4)
+				>;
+			gpio-output-low = <
+				TEGRA_GPIO(S, 7)
+				TEGRA_GPIO(T, 0)
+				TEGRA_GPIO(H, 0)
+				TEGRA_GPIO(H, 3)
+				TEGRA_GPIO(H, 4)
+				TEGRA_GPIO(H, 7)
+				TEGRA_GPIO(I, 0)
+				TEGRA_GPIO(I, 2)
+				>;
+			gpio-output-high = <
+				TEGRA_GPIO(A, 6)
+				TEGRA_GPIO(X, 3)
+				TEGRA_GPIO(I, 1)
+				TEGRA_GPIO(CC, 7)
+				>;
+		};
+	};
+};

keygo@keygo-txflash:~/Linux_for_Tegra/source/public$ diff -u ./kernel/kernel-4.9/drivers/gpio/gpio-tegra.c.bak ./kernel/kernel-4.9/drivers/gpio/gpio-tegra.c
--- ./kernel/kernel-4.9/drivers/gpio/gpio-tegra.c.bak	2021-11-05 14:27:15.093797696 +0800
+++ ./kernel/kernel-4.9/drivers/gpio/gpio-tegra.c	2021-11-05 15:53:12.000000000 +0800
@@ -217,6 +217,11 @@
 	tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 1);
 }
 
+static void tegra_gpio_disable(struct tegra_gpio_info *tgi, int gpio)
+{
+       tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 0);
+}
+
 static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset)
 {
 	tegra_gpio_save_gpio_state(offset);
@@ -225,8 +230,12 @@
 
 static void tegra_gpio_free(struct gpio_chip *chip, unsigned offset)
 {
+    struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
+    
 	pinctrl_free_gpio(chip->base + offset);
 	tegra_gpio_restore_gpio_state(offset);
+    
+    tegra_gpio_disable(tgi, offset);
 }
 
 static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -796,7 +805,10 @@
 	tegra_gpio_debuginit(tgi);
 
 	register_syscore_ops(&tegra_gpio_syscore_ops);
-
+    // free spi0 pins
+    for (gpio = 16; gpio <= 20; gpio++) {
+        tegra_gpio_free(&tgi->gc, gpio);
+    }
 	return 0;
 }


diff -u ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c.bak ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c
--- ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c.bak	2021-11-29 18:33:44.805837392 +0800
+++ ./kernel/kernel-4.9/drivers/spi/spi-tegra114.c	2021-11-08 12:26:07.000000000 +0800
@@ -1490,10 +1490,11 @@
 		msg->actual_length += xfer->len;
 
 complete_xfer:
-		if (prefer_last_used_cs)
+		// if (prefer_last_used_cs)
 			cmd1 = tspi->command1_reg;
-		else
-			cmd1 = tspi->def_command1_reg;
+		// else
+			// cmd1 = tspi->def_command1_reg;
+        
 		if (ret < 0 || skip) {
 			if (cstate && cstate->cs_gpio_valid)
 				gpio_set_value(spi->cs_gpio, gval);

@ShaneCCC Thanks

Can provide some suggest.Thanks

We’re checkign with internal team to see if further suggetions. Sorry for the late response.

thanks

Please apply below to verify the problem.

diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 2aadf42..747ce95 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -908,12 +908,8 @@ static void tegra_spi_set_timing1(struct spi_device *spi)
        if (!cdata || tspi->prod_list)
                return;
        set_count = min(cdata->cs_setup_clk_count, 16);
-       if (set_count)
-               set_count--;

        hold_count = min(cdata->cs_hold_clk_count, 16);
-       if (hold_count)
-               hold_count--;

        spi_cs_setup = SPI_SETUP_HOLD(set_count, hold_count);
        spi_cs_timing = SPI_CS_SETUP_HOLD(tspi->spi_cs_timing,

I have try it and it still doesn’t work.
I am not sure that my operation is correct.
Can you provide complete modification steps, including other files that need to be modified, such as .dts files and.c files?
Thanks

Hi, are you testing on SPI0 port of J41 connector? Can you share a photo of your test setting?