Nano Power Up Pin State Requirements

We are currently validating our power up sequence for the custom PCBA carrier board with the Jetson Nano and have a few questions regarding what the state of the peripheral pins should be prior to the Nano fully booting up?

  1. For USB_VBUS_EN0 (GPIO00) it is called out as Open Drain, 1.8V, however in the USB connection example there is no pull-up shown, but rather it is connected to external open drain. Do we need a 1.8V pull-up or will this affect the power up sequencing requirement of having <0.5V on a GPIO pin during power up?
  2. Are there any requirements for not having USB2.0 devices connected to the USB0/USB1/USB2 data pins during power up?
  3. Are there any requirements for not having Gigabit Ethernet connected to the Nano during power up?
  4. Is there a requirement to keep GPIO08 (Fan TACH) in a specific state during power up?
  5. UART1 TX/RX does not have this note, (unlike UART0 and UART2): “Buffered on module to keep connected devices from affecting state of the pin during power-on as it is one of the SoC strap pins.” Does this mean that we need to keep the UART1 RX line disconnected from any devices during bootup to prevent this behavior?
  6. Can the PWR_EN Signal line be run off of 3.3V logic instead of 5V logic

Thank you,

Next time please file nano topic into jetson nano zone.

  1. No need pull-up
  2. No requirements.
  3. No requirements.
  4. No requirement.
  5. No need to disconnect.
  6. No, please just follow guide.
1 Like