Need to resolve the SMMU errors while using the iperf3 commands

ann.r · May 26, 2023, 12:05pm

Hi,

I am trying to resolve the smmu errors which happens when the iperf command is being issues.

I have updated the dts and kernel files as shown below

git diff
diff --git a/kernel-dts/tegra194-soc/tegra194-soc-pcie.dtsi b/kernel-dts/tegra194-soc/tegra194-soc-pcie.dtsi
index 68037b7..b89bcf3 100644
--- a/kernel-dts/tegra194-soc/tegra194-soc-pcie.dtsi
+++ b/kernel-dts/tegra194-soc/tegra194-soc-pcie.dtsi
@@ -481,13 +481,6 @@
                                                        204000000 204000000 408000000  666000000
                                                        204000000 408000000 666000000  1066000000
                                                        408000000 666000000 1066000000 2133000000 >;
-
-               iommus = <&smmu TEGRA_SID_PCIE5>;
-               dma-coherent;
-#if LINUX_VERSION >= 414
-               iommu-map = <0x0 &smmu TEGRA_SID_PCIE5 0x1000>;
-               iommu-map-mask = <0x0>;
-#endif
        };
 
        pcie@14180000 {
@@ -867,12 +860,6 @@
                pinctrl-0 = <&pex_rst_c5_out_state>;
                pinctrl-1 = <&clkreq_c5_bi_dir_state>;
 
-               iommus = <&smmu TEGRA_SID_PCIE5>;
-               dma-coherent;
-#if LINUX_VERSION >= 414
-               iommu-map = <0x0 &smmu TEGRA_SID_PCIE5 0x1000>;
-               iommu-map-mask = <0x0>;
-#endif
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;

I am getting the below errors even though is I update the smmu biased by following the below steps for the AGX Xavier NX board. Could you please guide me to resolve the iommu erros in the board, which comes when I issue the iperf commands.

[ 634.336834] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 634.337855] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 634.338076] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 634.338232] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 634.338375] mc-err: secure: yes, access-type: write
[ 634.338517] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 635.111501] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 635.112444] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 635.112649] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 635.112844] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 635.113141] mc-err: secure: yes, access-type: write
[ 635.113283] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 635.143296] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 635.144143] mc-err: Too many MC errors; throttling prints
[ 635.847308] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 635.848258] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 635.848458] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 635.848635] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 635.848784] mc-err: secure: yes, access-type: write
[ 635.848899] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 636.965821] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 636.966561] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 636.966735] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 636.966896] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 636.967035] mc-err: secure: yes, access-type: write
[ 636.967147] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 637.735384] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 637.736323] mc-err: Too many MC errors; throttling prints
[ 638.087306] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 641.251637] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 641.252289] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 641.252448] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 641.252604] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 641.252733] mc-err: secure: yes, access-type: write
[ 641.252835] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 642.023448] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 642.024446] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 642.024653] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 642.024826] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 642.025042] mc-err: secure: yes, access-type: write
[ 642.025171] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 642.375410] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 642.376305] mc-err: Too many MC errors; throttling prints
[ 644.146305] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 644.147241] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 644.147446] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 644.147626] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 644.147765] mc-err: secure: yes, access-type: write
[ 644.147903] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000
[ 649.159195] t19x-arm-smmu 12000000.iommu: Unhandled context fault: smmu0, iova=0x4ffebf000, fsynr=0x220013, cb=3, sid=91(0x5b - PCIE5), pgd=8568d3003, pud=8568d3003, pmd=7e7a54003, pte=0
[ 649.160112] mc-err: vpr base=0:c6000000, size=20, ctrl=3, override:(a01a8340, fcee10c1, 1, 0)
[ 649.160320] mc-err: (255) csw_pcie5w: MC request violates VPR requirements
[ 649.160543] mc-err: status = 0x0ff740e3; addr = 0xffffffff00; hi_adr_reg=008
[ 649.160683] mc-err: secure: yes, access-type: write
[ 649.160821] mc-err: mcerr: unknown intr source intstatus = 0x00000000, intstatus_1 = 0x00000000

ann.r · May 31, 2023, 5:27am

@WayneWWW @kayccc Could you please help us to resolve the issue in the AGX Xavier

Regards
Ann Rose Antony

WayneWWW · May 31, 2023, 5:59am

What is your purpose to disable SMMU? Do you have your own driver to handle it after you disable smmu?

WayneWWW · May 31, 2023, 6:00am

Also, what is AGX Xavier NX board? AGX or NX? There is no such thing called AGX Xavier NX.

ann.r · May 31, 2023, 6:27am

Sorry it was my bad. The board I am using is AGX Xavier only.

Regards,
Ann Rose

ann.r · May 31, 2023, 6:28am

Ya we have a customised driver.

Regards,
Ann Rose Antony

WayneWWW · May 31, 2023, 8:28am

please disable this too.


--- a/drivers/iommu/arm-smmu-t19x.c
+++ b/drivers/iommu/arm-smmu-t19x.c
@@ -2535,7 +2535,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
        reg = readl_relaxed(ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0);
 
        /* Enable fault reporting */
-       reg |= (sCR0_GFRE | sCR0_GFIE | sCR0_GCFGFRE | sCR0_GCFGFIE | sCR0_USFCFG);
+       reg |= (sCR0_GFRE | sCR0_GFIE | sCR0_GCFGFRE | sCR0_GCFGFIE);
+
+       /* Disable Unidentified stream fault reporting */
+       reg &= ~(sCR0_USFCFG);
 
        /* Disable TLB broadcasting. */
        reg |= (sCR0_VMIDPNE | sCR0_PTM);

ann.r · June 1, 2023, 5:01am

Thanks for the response.

I have updated the same in the code and testing is in progress.

Will let you know if it works fine.

Thanks and Regards
Ann Rose

ann.r · June 8, 2023, 3:12pm

@WayneWWW ,

After updating these changes also I am observing the smmu erros in the dmesg logs.

Please help me to figure out the issue.

Thanks and Regards,
Ann Rose Antony

ann.r · June 14, 2023, 5:43am

@WayneWWW ,

The dtb was not flashed properly.

After proper update of the dtb, I was able to see the smmu errors have been removed.

Thanks for the support.

Thanks and Regards,
Ann Rose Antony

system · June 28, 2023, 5:47am

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