New C low latency library to manage the Jetson nano GPIO

Hi Everyone

Just to announce that I am developing a C library to manage the Jetson Nano GPIO, the novelty is in that is the only one that I am aware of that does NOT use the kernel tree (/sys/), therefore it does not need previous kernel configuration or anything like that, I use DMA to write directly into the CPU registers through mapping onto /dev/mem to get low latency and higher degree of control.

Anyways, I tested most pins with an oscilloscope and it works so far, looking for beta testers, maybe this is also useful for people trying to get a deep knowledge of the machine.

GITHUB LINK

FUNTIONALITY:

JETSON NANO (TX1) family only, so far it does not support the Xaviers, etc. No hardware to test it

GPIO control of all the header pinout as input or output

PWM (hardware) control on header pins 32 & 33

Serial communications such as I2C, SPI and UART are NOT supported yet

No need of previous kernel configuration, the library will take care of that on runtime

Low latency is expected (it does not go through the kernel) direct writing to the registers (DMA)

IT IS A VERY ALPHA, INCOMPLETE VERSION AND ALL SORT OF BUGS ARE EXPECTED!

2 Likes

Thanks for your sharing to the community!

I2C supported now over pins: 27 (GEN1_I2C_SDA) & 28 (GEN1_I2C_SCL) and 3 (GEN2_I2C_SDA) & 5 (GEN2_I2C_SCL) as i2c0 and i2c1. Tested with a MPU6050 gyroscope, looks ok.