I am successfully running the linux_audio_player.py example with an audio WAV file and I can see data coming in on the Holoscan FPGA Sensor Bridge HIF Rx interface but I am not seeing anything coming out of the SIF Tx AXIS interface.
The SIF Tx AXIS TREADY line is HIGH and ready to accept.
Is it correct to assume that I should be seeing the audio data on this interface?
Before starting, the script programs HSB user registers to enable I2S TX and configure FIFO thresholds (enable_i2s, set_tx_af_ae, set_tx_pause).
I see inside the linux_audio_player.py source file what you stated earlier.
I also see inside “main”, where it gets called.
On my ILA, I can confirm that the audio data is making it to my FPGA dev board but I am not seeing any SIF_Tx AXIS activity.
I am using Holoscan FPGA Sensor Bridge revision 2507 if that helps.
I resolved this by including some missing Holoscan register initialization.
