Additionally, regarding the current page fault timeline, it seems that a single entry showing read/write @ address corresponds to handling page faults in batches, with a 2MB unit being processed by the driver. If you look at the image, there are gaps before the migration events. I suspect these gaps represent the overhead for page fault handling, such as page unmapping, TLB shootdown, and other related operations. Could you please confirm if this is correct?
I understand that NVIDIA handles page faults by storing the fault address in a page fault buffer and then caching these faults in the CPU, processing multiple faults in batches with a 2MB unit using a loop. Could you explain how this batching appears in the timeline? Also, is it possible to extract metrics related to this batching process?
