Nvethernet Jetson ORIN EQOS MAC

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
,
1

We trying to get our board which is using a Microchip Lan9662 chip connected to
the Jetson ORIN EQOS MAC. The connection between them is a rgmii phy-less design. Using a
6.18.3 Linux kernel we are able to use this design with a few modifications to the nvethernet driver
to accommodate the lack of a phy.

The probblem is when I make the same changes to the R36.5 nvethernet driver the EQOS MAC

never appears to come out of reset. The function call hw_poll_for_swr which polls BIT(0) in

the EQOS_DMA_BMR register and it never goes to 0. It does correctly go to 0 in the 6.18.3 implementation.

I have tried tracing the differences between what is being done in the R36.5 and the 6.18.3 implementations
and they appear to be doing the same initialization steps and the relevant section of the DTB’s appear to
be the same. So my question is what conditions should I be checking for that would keep the EQOS MAC from
coming out of its reset state?

Thank you in advance.

3

Are you sure this is a topic for Orin NX? You filed this topic in Orin NX forum.

4

Well, it seemed appropriate since we use Orin AGX and IGX and the nvethernet is tied to the orin module, but I am happy to revisit it some place else. Although, the contacts I have shared this with at Nvidia didn’t seem to question this.

5

It is just basic items to triage questions.
let me move this to Orin AGX forum.

7

Thank you

8

Have you confirmed the pinmux is already configured to the same result as rel-36.5 for EQOS?

9

We are ding this again now and I wanted to be sure and then reply. I will reply in am.