I am integrating the VIC into my existing V4L application. I have opened the descritor, and set up a capture plane (with V4L_MEMORY_USERPTR), and an output plane (with V4L_MEMORY_DMABUF).
If I map my dmabufs going in, i get data; the pipeline seems to be working (I am able to DQ capture buffers), but my capture buffers are all unmodified (they contain the same data that they did when they were queued).
My input DMABUFS are coming from libargus. they’re V4L2_PIX_FMT_YUV420M and V4L2_NV_BUFFER_LAYOUT_BLOCKLINEAR. I’m trying to convert to V4L2_PIX_FMT_ABGR32 and V4L2_NV_BUFFER_LAYOUT_PITCH
Is there some step i may be missing? how can I debug this?