Hello, as shown in the figure below, why can I get the following two pieces of information from the schematic diagram? (The USB 2.0 signal pair is wired to USB2 port 1; The USB3.0 signal pairs are wired to USB3.0 port 0), are there any other rules I don’t know about?
Hi, I don’t get what your question is. For USB circuit design, you can refer to the TX2 Design Guide doc in DLC first.
I don’t understand how to get the two sentences in parentheses
can you post a link to the documentation
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