# Nx dual hdmi setting

**URL:** <https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390>\
**Category:** Jetson Xavier NX\
**Tags:** hdmi\
**Created:** [October 19, 2020, 11:13am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390 "2020-10-19T11:13:48Z")\
**Posts on this page:** 18\
**Page:** 1

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 19, 2020, 11:13am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/1 "2020-10-19T11:13:48Z")

</div>

Hi everyone  
we desiged a carrier board for nx which have dual hdmi,one hdmi used DP0 from module,which desiged for dp\_display in nv nx devkit ,the other used DP1 .The Hdmi on DP0 show nothing,The hdmi on DP1 show normally.  
attachmet is my modify in dts file and dmesg that insert hdmi cable during bootup,please give some advise ,thanks everyone.  
the dtsi file that modify:  
— a/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi  
+++ b/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi  
@@ -51,20 +51,27 @@  
nvidia,dc-flags = \<TEGRA\_DC\_FLAG\_ENABLED\>;  
vdd-dp-pwr-supply = \<&p3668\_spmic\_sd0\>;  
avdd-dp-pll-supply = \<&p3668\_spmic\_sd1\>;

- vdd-edp-sec-mode-supply = \<&battery\_reg\>;
- vdd-dp-pad-supply = \<&battery\_reg\>;  
+// vdd-edp-sec-mode-supply = \<&battery\_reg\>;  
+// vdd-dp-pad-supply = \<&battery\_reg\>;  
vdd\_hdmi\_5v0-supply = \<&p3509\_vdd\_hdmi\_5v0\>;  
};

&sor0 {  
status = “okay”;

- nvidia,active-panel = \<&sor0\_dp\_display\>;

- nvidia,active-panel = \<&sor0\_hdmi\_display\>;  
+// nvidia,active-panel = \<&sor0\_dp\_display\>;  
};

-&sor0\_dp\_display {

- status = “okay”;
- nvidia,is\_ext\_dp\_panel = \<1\>;  
+&sor0\_hdmi\_display{

- status =“okay”;
- 

```
   disp-default-out {

```

- 

```
  nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>;

```

- };  
};  
+//&sor0\_dp\_display {  
+// status = “okay”;  
+// nvidia,is\_ext\_dp\_panel = \<1\>;  
+//};

&sor1 {  
status = “okay”;

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 19, 2020, 11:51am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/2 "2020-10-19T11:51:45Z")

</div>

Hi ,  
insert hdmi cable the dmesg log is as below:  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegradc 15210000.nvdisplay: blank - powerdown  
tegradc 15210000.nvdisplay: unblank  
tegra\_nvdisp\_handle\_pd\_enable: Unpowergated Head0 pd  
tegra\_nvdisp\_handle\_pd\_enable: Unpowergated Head1 pd  
tegra\_nvdisp\_handle\_pd\_enable: Unpowergated Head2 pd  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
Parent Clock set for DC pll\_d  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegradc 15210000.nvdisplay: hdmi: tmds rate:85500K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
tegradc 15200000.nvdisplay: hdmi: edid read failed  
tegradc 15200000.nvdisplay: hdmi: using fallback edid  
extcon-disp-state external-connection:disp-state: cable 46 state 1  
Extcon AUX0(HDMI) enable  
tegradc 15200000.nvdisplay: blank - powerdown  
tegradc 15200000.nvdisplay: unblank  
Parent Clock set for DC plld2  
tegradc 15200000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
extcon-disp-state external-connection:disp-state: cable 47 state 1  
Extcon AUX1(HDMI) enable  
extcon-disp-state external-connection:disp-state: cable 40 state 1  
Extcon HDMI: HPD enabled  
tegradc 15210000.nvdisplay: hdmi: plugged  
extcon-disp-state external-connection:disp-state: cable 51 state 1  
Extcon HDMI: HPD enabled  
tegradc 15200000.nvdisplay: hdmi: plugged  
tegradc 15200000.nvdisplay: Invalid out\_w + out\_x (1366) \> hActive (1280)  
OR/AND out\_h + out\_y (768) \> vActive (720)  
for WIN 0  
tegradc 15200000.nvdisplay: blank - powerdown  
extcon-disp-state external-connection:disp-state: cable 47 state 0  
Extcon AUX1(HDMI) disable  
tegradc 15200000.nvdisplay: unblank  
Parent Clock set for DC plld2  
tegradc 15200000.nvdisplay: hdmi: tmds rate:85800K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
extcon-disp-state external-connection:disp-state: cable 47 state 1  
Extcon AUX1(HDMI) enable  
tegradc 15200000.nvdisplay: unblank  
tegradc 15210000.nvdisplay: blank - powerdown  
extcon-disp-state external-connection:disp-state: cable 46 state 0  
Extcon AUX0(HDMI) disable  
tegra\_nvdisp\_handle\_pd\_disable: Powergated Head2 pd  
tegradc 15210000.nvdisplay: unblank  
tegra\_nvdisp\_handle\_pd\_enable: Unpowergated Head2 pd  
Parent Clock set for DC pll\_d  
tegradc 15210000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.  
extcon-disp-state external-connection:disp-state: cable 46 state 1  
Extcon AUX0(HDMI) enable  
tegradc 15210000.nvdisplay: unblank  
tegradc 15200000.nvdisplay: unblank  
tegradc 15210000.nvdisplay: unblank  
tegradc 15200000.nvdisplay: unblank  
tegradc 15210000.nvdisplay: blank - powerdown  
extcon-disp-state external-connection:disp-state: cable 46 state 0  
Extcon AUX0(HDMI) disable  
tegra\_nvdisp\_handle\_pd\_disable: Powergated Head2 pd  
tegradc 15210000.nvdisplay: unblank  
tegra\_nvdisp\_handle\_pd\_enable: Unpowergated Head2 pd  
Parent Clock set for DC pll\_d  
tegradc 15210000.nvdisplay: hdmi: tmds rate:85500K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.  
extcon-disp-state external-connection:disp-state: cable 46 state 1  
Extcon AUX0(HDMI) enable  
tegradc 15210000.nvdisplay: unblank  
tegradc 15200000.nvdisplay: blank - powerdown  
extcon-disp-state external-connection:disp-state: cable 47 state 0  
Extcon AUX1(HDMI) disable  
tegradc 15200000.nvdisplay: unblank  
Parent Clock set for DC plld2  
tegradc 15200000.nvdisplay: hdmi: tmds rate:74250K prod-setting:prod\_c\_hdmi\_54m\_111m  
tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.  
tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.  
tegra-i2c 3190000.i2c: no acknowledge from address 0x50  
extcon-disp-state external-connection:disp-state: cable 47 state 1  
Extcon AUX1(HDMI) enable  
tegradc 15200000.nvdisplay: unblank  
tegradc 15210000.nvdisplay: unblank

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 2:46am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/4 "2020-10-20T02:46:00Z")

</div>

Please check the pinmux setting of dpaux0 and dpaux1. You should use the same setting as the HDMI port on DP1.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 3:44am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/5 "2020-10-20T03:44:43Z")

</div>

Hi WayneWWW,  
I disable dpaux0 in dtsi hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi,and issue is same ,hdmi can not show,if i disable dpaux1,the hdmi that work normal block in bootup logo.  
I check the dpaux0 and dpaux1 ,but don’t find the file about pinmux setting of dpaux0 and dpaux1,could you give some tips,thanks.

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 4:08am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/6 "2020-10-20T04:08:13Z")

</div>

Sorry for my mistake. No need to disable dpaux.

Go to Linux\_for\_Tegra/bootloader/t186ref and fine the cfg file for your pinmux.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 5:14am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/7 "2020-10-20T05:14:14Z")

</div>

Hi wayneWWW,  
check spreedsheet of Jetson\_Xavier\_NX\_Pinmux\_Configuration\_Template\_v1.06,DP0 and DP1 is same,

## 

## Pinmux version 1.0

## Input pinmux file name: tegra19x-jetson\_xavier\_nx\_module-pinmux.dtsi

## Input gpio file name: tegra19x-jetson\_xavier\_nx\_module-gpio-default.dtsi

## Generation date: 2020-08-31 10:02

## PLEASE DO NOT EDIT THIS FILE

## This is autogenerated file using the script pinmux-dts2cfg.py

## 

pinmux.major = 1;  
pinmux.minor = 0;

#### Pinmux for gpio-input pins

pinmux.0x022136e0 = 0x00000001; # CONFIG S7  
pinmux.0x02431008 = 0x00000000; # GPIO soc\_gpio32\_ps7  
pinmux.0x02214000 = 0x00000001; # CONFIG G0  
pinmux.0x02434058 = 0x00000000; # GPIO soc\_gpio00\_pg0  
pinmux.0x02214080 = 0x00000001; # CONFIG G4  
pinmux.0x02434070 = 0x00000000; # GPIO soc\_gpio08\_pg4  
pinmux.0x022140e0 = 0x00000001; # CONFIG G7  
pinmux.0x02434088 = 0x00000000; # GPIO soc\_gpio11\_pg7  
pinmux.0x02214260 = 0x00000001; # CONFIG H3  
pinmux.0x02434038 = 0x00000000; # GPIO uart4\_tx\_ph3  
pinmux.0x022142a0 = 0x00000001; # CONFIG H5  
pinmux.0x02434028 = 0x00000000; # GPIO uart4\_rts\_ph5  
pinmux.0x02212200 = 0x00000001; # CONFIG Y0  
pinmux.0x0243d048 = 0x00000000; # GPIO spi3\_sck\_py0  
pinmux.0x02212220 = 0x00000001; # CONFIG Y1  
pinmux.0x0243d008 = 0x00000000; # GPIO spi3\_miso\_py1  
pinmux.0x02212240 = 0x00000001; # CONFIG Y2  
pinmux.0x0243d060 = 0x00000000; # GPIO spi3\_mosi\_py2  
pinmux.0x02212260 = 0x00000001; # CONFIG Y3  
pinmux.0x0243d018 = 0x00000000; # GPIO spi3\_cs0\_py3  
pinmux.0x02212280 = 0x00000001; # CONFIG Y4  
pinmux.0x0243d028 = 0x00000000; # GPIO spi3\_cs1\_py4  
pinmux.0x022122a0 = 0x00000001; # CONFIG Y5  
pinmux.0x0243d098 = 0x00000000; # GPIO uart5\_tx\_py5  
pinmux.0x022122e0 = 0x00000001; # CONFIG Y7  
pinmux.0x0243d0a0 = 0x00000000; # GPIO uart5\_rts\_py7  
pinmux.0x02212420 = 0x00000001; # CONFIG Z1  
pinmux.0x0243d0b0 = 0x00000000; # GPIO usb\_vbus\_en0\_pz1  
pinmux.0x02212460 = 0x00000001; # CONFIG Z3  
pinmux.0x0243d040 = 0x00000000; # GPIO spi1\_sck\_pz3  
pinmux.0x02212480 = 0x00000001; # CONFIG Z4  
pinmux.0x0243d020 = 0x00000000; # GPIO spi1\_miso\_pz4  
pinmux.0x022124a0 = 0x00000001; # CONFIG Z5  
pinmux.0x0243d058 = 0x00000000; # GPIO spi1\_mosi\_pz5  
pinmux.0x022124c0 = 0x00000001; # CONFIG Z6  
pinmux.0x0243d010 = 0x00000000; # GPIO spi1\_cs0\_pz6  
pinmux.0x022124e0 = 0x00000001; # CONFIG Z7  
pinmux.0x0243d050 = 0x00000000; # GPIO spi1\_cs1\_pz7  
pinmux.0x0c2f1000 = 0x00000001; # CONFIG EE0  
pinmux.0x0c301010 = 0x00000000; # GPIO safe\_state\_pee0  
pinmux.0x0c2f1080 = 0x00000001; # CONFIG EE4  
pinmux.0x0c301038 = 0x00000000; # GPIO power\_on\_pee4  
pinmux.0x0c2f1280 = 0x00000001; # CONFIG CC4  
pinmux.0x0c302000 = 0x00000000; # GPIO touch\_clk\_pcc4  
pinmux.0x02212c20 = 0x00000001; # CONFIG Q1  
pinmux.0x02430058 = 0x00000000; # GPIO soc\_gpio21\_pq1  
pinmux.0x02212c60 = 0x00000001; # CONFIG Q3  
pinmux.0x02430068 = 0x00000000; # GPIO soc\_gpio23\_pq3  
pinmux.0x02212ca0 = 0x00000001; # CONFIG Q5  
pinmux.0x02430028 = 0x00000000; # GPIO soc\_gpio41\_pq5  
pinmux.0x02212cc0 = 0x00000001; # CONFIG Q6  
pinmux.0x02430030 = 0x00000000; # GPIO soc\_gpio42\_pq6  
pinmux.0x02212e00 = 0x00000001; # CONFIG R0  
pinmux.0x02430040 = 0x00000000; # GPIO soc\_gpio44\_pr0  
pinmux.0x02212e80 = 0x00000001; # CONFIG R4  
pinmux.0x02430098 = 0x00000000; # GPIO uart1\_rts\_pr4  
pinmux.0x02212ea0 = 0x00000001; # CONFIG R5  
pinmux.0x02430090 = 0x00000000; # GPIO uart1\_cts\_pr5  
pinmux.0x02213240 = 0x00000001; # CONFIG L2  
pinmux.0x02437008 = 0x00000000; # GPIO pex\_wake\_n\_pl2  
pinmux.0x02212820 = 0x00000001; # CONFIG N1  
pinmux.0x02440020 = 0x00000000; # GPIO soc\_gpio54\_pn1

#### Pinmux for gpio-output-low pins

pinmux.0x02214040 = 0x00000003; # CONFIG G2  
pinmux.0x0221404c = 0x00000000; # CONTROL G2  
pinmux.0x02214050 = 0x00000000; # OUTPUT G2  
pinmux.0x02434048 = 0x00000000; # GPIO soc\_gpio02\_pg2  
pinmux.0x02212000 = 0x00000003; # CONFIG X0  
pinmux.0x0221200c = 0x00000000; # CONTROL X0  
pinmux.0x02212010 = 0x00000000; # OUTPUT X0  
pinmux.0x0243d000 = 0x00000000; # GPIO gpu\_pwr\_req\_px0  
pinmux.0x0c2f16a0 = 0x00000003; # CONFIG AA5  
pinmux.0x0c2f16ac = 0x00000000; # CONTROL AA5  
pinmux.0x0c2f16b0 = 0x00000000; # OUTPUT AA5  
pinmux.0x0c303028 = 0x00000000; # GPIO can0\_en\_paa5  
pinmux.0x0c2f1200 = 0x00000003; # CONFIG CC0  
pinmux.0x0c2f120c = 0x00000000; # CONTROL CC0  
pinmux.0x0c2f1210 = 0x00000000; # OUTPUT CC0  
pinmux.0x0c302048 = 0x00000000; # GPIO spi2\_sck\_pcc0  
pinmux.0x0c2f1240 = 0x00000003; # CONFIG CC2  
pinmux.0x0c2f124c = 0x00000000; # CONTROL CC2  
pinmux.0x0c2f1250 = 0x00000000; # OUTPUT CC2  
pinmux.0x0c302028 = 0x00000000; # GPIO spi2\_mosi\_pcc2  
pinmux.0x0c2f1260 = 0x00000003; # CONFIG CC3  
pinmux.0x0c2f126c = 0x00000000; # CONTROL CC3  
pinmux.0x0c2f1270 = 0x00000000; # OUTPUT CC3  
pinmux.0x0c302038 = 0x00000000; # GPIO spi2\_cs0\_pcc3  
pinmux.0x02212a80 = 0x00000003; # CONFIG P4  
pinmux.0x02212a8c = 0x00000000; # CONTROL P4  
pinmux.0x02212a90 = 0x00000000; # OUTPUT P4  
pinmux.0x02430070 = 0x00000000; # GPIO soc\_gpio04\_pp4  
pinmux.0x02212aa0 = 0x00000003; # CONFIG P5  
pinmux.0x02212aac = 0x00000000; # CONTROL P5  
pinmux.0x02212ab0 = 0x00000000; # OUTPUT P5  
pinmux.0x02430078 = 0x00000000; # GPIO soc\_gpio05\_pp5  
pinmux.0x02214e00 = 0x00000003; # CONFIG B0  
pinmux.0x02214e0c = 0x00000000; # CONTROL B0  
pinmux.0x02214e10 = 0x00000000; # OUTPUT B0  
pinmux.0x02446008 = 0x00000000; # GPIO cpu\_pwr\_req\_0\_pb0

#### Pinmux for gpio-output-high pins

pinmux.0x0c2f1220 = 0x00000003; # CONFIG CC1  
pinmux.0x0c2f122c = 0x00000000; # CONTROL CC1  
pinmux.0x0c2f1230 = 0x00000001; # OUTPUT CC1  
pinmux.0x0c302050 = 0x00000000; # GPIO spi2\_miso\_pcc1

#### Pinmux for used pins

pinmux.0x02431020 = 0x00000400; # aud\_mclk\_ps4: aud, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02431060 = 0x00000440; # dap3\_sclk\_pt1: i2s3, tristate-disable, input-enable, lpdr-disable  
pinmux.0x02431058 = 0x00000400; # dap3\_dout\_pt2: i2s3, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02431050 = 0x00000450; # dap3\_din\_pt3: i2s3, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02431048 = 0x00000440; # dap3\_fs\_pt4: i2s3, tristate-disable, input-enable, lpdr-disable  
pinmux.0x02431080 = 0x00000440; # dap5\_sclk\_pt5: i2s5, tristate-disable, input-enable, lpdr-disable  
pinmux.0x02431078 = 0x00000400; # dap5\_dout\_pt6: i2s5, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02431070 = 0x00000450; # dap5\_din\_pt7: i2s5, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02431068 = 0x00000440; # dap5\_fs\_pu0: i2s5, tristate-disable, input-enable, lpdr-disable  
pinmux.0x02438000 = 0x0000a460; # sdmmc1\_clk\_pj0: sdmmc1, tristate-disable, input-enable, loopback-enable  
pinmux.0x02438008 = 0x0000a448; # sdmmc1\_cmd\_pj1: sdmmc1, pull-up, tristate-disable, input-enable  
pinmux.0x02438030 = 0x0000a448; # sdmmc1\_dat0\_pj2: sdmmc1, pull-up, tristate-disable, input-enable  
pinmux.0x02438028 = 0x0000a448; # sdmmc1\_dat1\_pj3: sdmmc1, pull-up, tristate-disable, input-enable  
pinmux.0x02438020 = 0x0000a448; # sdmmc1\_dat2\_pj4: sdmmc1, pull-up, tristate-disable, input-enable  
pinmux.0x02438018 = 0x0000a448; # sdmmc1\_dat3\_pj5: sdmmc1, pull-up, tristate-disable, input-enable  
pinmux.0x0243a030 = 0x0000a460; # sdmmc3\_clk\_po0: sdmmc3, tristate-disable, input-enable, loopback-enable  
pinmux.0x0243a028 = 0x0000a448; # sdmmc3\_cmd\_po1: sdmmc3, pull-up, tristate-disable, input-enable  
pinmux.0x0243a018 = 0x0000a448; # sdmmc3\_dat0\_po2: sdmmc3, pull-up, tristate-disable, input-enable  
pinmux.0x0243a010 = 0x0000a448; # sdmmc3\_dat1\_po3: sdmmc3, pull-up, tristate-disable, input-enable  
pinmux.0x0243a008 = 0x0000a448; # sdmmc3\_dat2\_po4: sdmmc3, pull-up, tristate-disable, input-enable  
pinmux.0x0243a000 = 0x0000a448; # sdmmc3\_dat3\_po5: sdmmc3, pull-up, tristate-disable, input-enable  
pinmux.0x02445058 = 0x00022400; # eqos\_txc\_pe0: eqos, tristate-disable, input-disable  
pinmux.0x02445018 = 0x00022400; # eqos\_td0\_pe1: eqos, tristate-disable, input-disable  
pinmux.0x02445010 = 0x00022400; # eqos\_td1\_pe2: eqos, tristate-disable, input-disable  
pinmux.0x02445008 = 0x00022400; # eqos\_td2\_pe3: eqos, tristate-disable, input-disable  
pinmux.0x02445000 = 0x00022400; # eqos\_td3\_pe4: eqos, tristate-disable, input-disable  
pinmux.0x02445068 = 0x00022400; # eqos\_tx\_ctl\_pe5: eqos, tristate-disable, input-disable  
pinmux.0x02445040 = 0x00022450; # eqos\_rd0\_pe6: eqos, tristate-enable, input-enable  
pinmux.0x02445030 = 0x00022450; # eqos\_rd1\_pe7: eqos, tristate-enable, input-enable  
pinmux.0x02445028 = 0x00022450; # eqos\_rd2\_pf0: eqos, tristate-enable, input-enable  
pinmux.0x02445020 = 0x00022470; # eqos\_rd3\_pf1: eqos, tristate-enable, input-enable  
pinmux.0x02445070 = 0x00022450; # eqos\_rx\_ctl\_pf2: eqos, tristate-enable, input-enable  
pinmux.0x02445060 = 0x00022450; # eqos\_rxc\_pf3: eqos, tristate-enable, input-enable  
pinmux.0x02445038 = 0x00022440; # eqos\_sma\_mdio\_pf4: eqos, tristate-disable, input-enable  
pinmux.0x02445048 = 0x00022400; # eqos\_sma\_mdc\_pf5: eqos, tristate-disable, input-disable  
pinmux.0x0243b020 = 0x00023460; # qspi0\_sck\_pc0: qspi0, tristate-disable, input-enable, loopback-enable  
pinmux.0x0243b028 = 0x00023400; # qspi0\_cs\_n\_pc1: qspi0, tristate-disable, input-disable  
pinmux.0x0243b018 = 0x00023440; # qspi0\_io0\_pc2: qspi0, tristate-disable, input-enable  
pinmux.0x0243b010 = 0x00023440; # qspi0\_io1\_pc3: qspi0, tristate-disable, input-enable  
pinmux.0x0243b008 = 0x00023440; # qspi0\_io2\_pc4: qspi0, tristate-disable, input-enable  
pinmux.0x0243b000 = 0x00023440; # qspi0\_io3\_pc5: qspi0, tristate-disable, input-enable  
pinmux.0x02436008 = 0x00002460; # sdmmc4\_clk: sdmmc4, tristate-disable, input-enable, loopback-enable  
pinmux.0x02436010 = 0x00002440; # sdmmc4\_cmd: sdmmc4, tristate-disable, input-enable  
pinmux.0x02436058 = 0x00002448; # sdmmc4\_dat0: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436050 = 0x00002448; # sdmmc4\_dat1: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436048 = 0x00002448; # sdmmc4\_dat2: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436040 = 0x00002448; # sdmmc4\_dat3: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436038 = 0x00002448; # sdmmc4\_dat4: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436030 = 0x00002448; # sdmmc4\_dat5: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436028 = 0x00002448; # sdmmc4\_dat6: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436020 = 0x00002448; # sdmmc4\_dat7: sdmmc4, pull-up, tristate-disable, input-enable  
pinmux.0x02436018 = 0x00000450; # sdmmc4\_dqs: sdmmc4, tristate-enable, input-enable  
pinmux.0x02434080 = 0x00000410; # soc\_gpio10\_pg6: gp, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434098 = 0x00000401; # soc\_gpio13\_ph1: gp, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02434060 = 0x00000540; # gen1\_i2c\_scl\_pi3: i2c1, tristate-disable, input-enable, io\_high\_voltage-disable, lpdr-enable  
pinmux.0x02434068 = 0x00000540; # gen1\_i2c\_sda\_pi4: i2c1, tristate-disable, input-enable, io\_high\_voltage-disable, lpdr-enable  
pinmux.0x0243d038 = 0x00000410; # gp\_pwm2\_px2: gp, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d070 = 0x00000400; # uart2\_tx\_px4: uartb, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d078 = 0x00000450; # uart2\_rx\_px5: uartb, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d080 = 0x00000408; # uart2\_rts\_px6: uartb, pull-up, tristate-disable, input-disable, lpdr-disable  
pinmux.0x0243d088 = 0x00000458; # uart2\_cts\_px7: uartb, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0c301000 = 0x00000400; # shutdown\_n: shutdown, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c301018 = 0x00000458; # vcomp\_alert\_pee1: soc, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0c301040 = 0x00000440; # pwr\_i2c\_scl\_pee5: i2c5, tristate-disable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c301048 = 0x00000440; # pwr\_i2c\_sda\_pee6: i2c5, tristate-disable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c301028 = 0x00000458; # batt\_oc\_pee3: soc, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0c303010 = 0x0000c400; # can0\_dout\_paa2: can0, tristate-disable, input-disable  
pinmux.0x0c303018 = 0x0000c450; # can0\_din\_paa3: can0, tristate-enable, input-enable  
pinmux.0x0c302010 = 0x00000400; # uart3\_tx\_pcc5: uartc, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302008 = 0x00000450; # uart3\_rx\_pcc6: uartc, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302030 = 0x00000560; # gen2\_i2c\_scl\_pcc7: i2c2, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x0c302040 = 0x00000560; # gen2\_i2c\_sda\_pdd0: i2c2, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x0c302020 = 0x00000560; # gen8\_i2c\_scl\_pdd1: i2c8, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x0c302018 = 0x00000560; # gen8\_i2c\_sda\_pdd2: i2c8, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x02430008 = 0x00000400; # extperiph1\_clk\_pp0: extperiph1, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02430000 = 0x00000400; # extperiph2\_clk\_pp1: extperiph2, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02430018 = 0x00000460; # cam\_i2c\_scl\_pp2: i2c3, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02430010 = 0x00000460; # cam\_i2c\_sda\_pp3: i2c3, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02430088 = 0x0000045a; # soc\_gpio07\_pp7: soc, pull-up, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02430060 = 0x00000459; # soc\_gpio22\_pq2: nv, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x024300a8 = 0x00000400; # uart1\_tx\_pr2: uarta, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x024300a0 = 0x00000454; # uart1\_rx\_pr3: uarta, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437048 = 0x00000560; # pex\_l4\_clkreq\_n\_pl0: pe4, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x02437050 = 0x00000520; # pex\_l4\_rst\_n\_pl1: pe4, tristate-disable, input-disable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x02440030 = 0x00000450; # dp\_aux\_ch0\_hpd\_pm0: dp, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02440038 = 0x00000450; # dp\_aux\_ch1\_hpd\_pm1: dp, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02440050 = 0x00000460; # hdmi\_cec\_pm4: hdmi, tristate-disable, input-enable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02431008 = 0x00000058; # soc\_gpio32\_ps7: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02434058 = 0x00000058; # soc\_gpio00\_pg0: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02434048 = 0x00000000; # soc\_gpio02\_pg2: rsvd0, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02434070 = 0x00000050; # soc\_gpio08\_pg4: rsvd0, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02434088 = 0x00000058; # soc\_gpio11\_pg7: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02434038 = 0x00000051; # uart4\_tx\_ph3: rsvd1, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02434028 = 0x00000051; # uart4\_rts\_ph5: rsvd1, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d000 = 0x00000000; # gpu\_pwr\_req\_px0: rsvd0, tristate-disable, input-disable, lpdr-disable  
pinmux.0x0243d048 = 0x00000055; # spi3\_sck\_py0: rsvd1, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d008 = 0x00000055; # spi3\_miso\_py1: rsvd1, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d060 = 0x00000055; # spi3\_mosi\_py2: rsvd1, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d018 = 0x00000055; # spi3\_cs0\_py3: rsvd1, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d028 = 0x00000055; # spi3\_cs1\_py4: rsvd1, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d098 = 0x00000051; # uart5\_tx\_py5: rsvd1, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d0a0 = 0x00000051; # uart5\_rts\_py7: rsvd1, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d0b0 = 0x00000049; # usb\_vbus\_en0\_pz1: rsvd1, pull-up, tristate-disable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0243d040 = 0x00000055; # spi1\_sck\_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d020 = 0x00000055; # spi1\_miso\_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d058 = 0x00000055; # spi1\_mosi\_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d010 = 0x00000059; # spi1\_cs0\_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0243d050 = 0x00000059; # spi1\_cs1\_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0c301010 = 0x00000051; # safe\_state\_pee0: rsvd1, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c301038 = 0x00000058; # power\_on\_pee4: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x0c303028 = 0x0000c000; # can0\_en\_paa5: rsvd0, tristate-disable, input-disable  
pinmux.0x0c302048 = 0x00000002; # spi2\_sck\_pcc0: rsvd2, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302050 = 0x00000002; # spi2\_miso\_pcc1: rsvd2, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302028 = 0x00000002; # spi2\_mosi\_pcc2: rsvd2, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302038 = 0x00000002; # spi2\_cs0\_pcc3: rsvd2, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c302000 = 0x00000056; # touch\_clk\_pcc4: rsvd2, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02430070 = 0x00000000; # soc\_gpio04\_pp4: rsvd0, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02430078 = 0x00000000; # soc\_gpio05\_pp5: rsvd0, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02430058 = 0x00000054; # soc\_gpio21\_pq1: rsvd0, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02430068 = 0x00000058; # soc\_gpio23\_pq3: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02430020 = 0x00000426; # soc\_gpio40\_pq4: rsvd2, pull-down, tristate-disable, input-disable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02430028 = 0x0000005a; # soc\_gpio41\_pq5: rsvd2, pull-up, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02430030 = 0x0000005a; # soc\_gpio42\_pq6: rsvd2, pull-up, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02430038 = 0x00000426; # soc\_gpio43\_pq7: rsvd2, pull-down, tristate-disable, input-disable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02430040 = 0x00000056; # soc\_gpio44\_pr0: rsvd2, pull-down, tristate-enable, input-enable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02430048 = 0x00000431; # soc\_gpio45\_pr1: rsvd1, tristate-enable, input-disable, io\_high\_voltage-enable, lpdr-disable  
pinmux.0x02430098 = 0x00000055; # uart1\_rts\_pr4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02430090 = 0x00000055; # uart1\_cts\_pr5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable  
pinmux.0x02446008 = 0x00000000; # cpu\_pwr\_req\_0\_pb0: rsvd0, tristate-disable, input-disable, lpdr-disable  
pinmux.0x02437008 = 0x00000178; # pex\_wake\_n\_pl2: rsvd0, pull-up, tristate-enable, input-enable, io\_high\_voltage-enable, lpdr-enable  
pinmux.0x02440020 = 0x00000058; # soc\_gpio54\_pn1: rsvd0, pull-up, tristate-enable, input-enable, lpdr-disable

#### Pinmux for unused pins for low-power configuration

pinmux.0x02431040 = 0x00000415; # dap1\_sclk\_ps0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431038 = 0x00000415; # dap1\_dout\_ps1: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431030 = 0x00000415; # dap1\_din\_ps2: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431028 = 0x00000415; # dap1\_fs\_ps3: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431018 = 0x00000414; # soc\_gpio30\_ps5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431010 = 0x00000414; # soc\_gpio31\_ps6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02431000 = 0x00000414; # soc\_gpio33\_pt0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243b050 = 0x00023435; # qspi1\_sck\_pc6: rsvd1, pull-down, tristate-enable, input-disable, loopback-enable  
pinmux.0x0243b058 = 0x00023415; # qspi1\_cs\_n\_pc7: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0243b048 = 0x00023415; # qspi1\_io0\_pd0: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0243b040 = 0x00023415; # qspi1\_io1\_pd1: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0243b038 = 0x00023415; # qspi1\_io2\_pd2: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0243b030 = 0x00023415; # qspi1\_io3\_pd3: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x02434050 = 0x00000414; # soc\_gpio01\_pg1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434040 = 0x00000414; # soc\_gpio03\_pg3: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434078 = 0x00000414; # soc\_gpio09\_pg5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434090 = 0x00000414; # soc\_gpio12\_ph0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x024340a0 = 0x00000414; # soc\_gpio14\_ph2: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434030 = 0x00000415; # uart4\_rx\_ph4: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434020 = 0x00000415; # uart4\_cts\_ph6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434018 = 0x00000415; # dap2\_sclk\_ph7: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434008 = 0x00000415; # dap2\_dout\_pi0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434000 = 0x00000415; # dap2\_din\_pi1: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02434010 = 0x00000415; # dap2\_fs\_pi2: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d068 = 0x00000414; # cv\_pwr\_req\_px1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d030 = 0x00000415; # gp\_pwm3\_px3: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d090 = 0x00000415; # uart5\_rx\_py6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d0a8 = 0x00000415; # uart5\_cts\_pz0: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x0243d0b8 = 0x00000415; # usb\_vbus\_en1\_pz2: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c301060 = 0x00000415; # ao\_retention\_n\_pee2: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x0c303000 = 0x0000c415; # can1\_dout\_paa0: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0c303008 = 0x0000c415; # can1\_din\_paa1: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x0c303020 = 0x0000c414; # can0\_stb\_paa4: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303030 = 0x0000c414; # can0\_wake\_paa6: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303038 = 0x0000c414; # can0\_err\_paa7: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303040 = 0x0000c414; # can1\_stb\_pbb0: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303048 = 0x0000c414; # can1\_en\_pbb1: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303050 = 0x0000c414; # can1\_wake\_pbb2: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x0c303058 = 0x0000c414; # can1\_err\_pbb3: rsvd0, pull-down, tristate-enable, input-disable  
pinmux.0x02430080 = 0x00000414; # soc\_gpio06\_pp6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02430050 = 0x00000414; # soc\_gpio20\_pq0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02432018 = 0x0000c416; # dap6\_sclk\_pa0: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432010 = 0x0000c416; # dap6\_dout\_pa1: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432008 = 0x0000c416; # dap6\_din\_pa2: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432000 = 0x0000c416; # dap6\_fs\_pa3: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432038 = 0x0000c416; # dap4\_sclk\_pa4: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432030 = 0x0000c416; # dap4\_dout\_pa5: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432028 = 0x0000c416; # dap4\_din\_pa6: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02432020 = 0x0000c416; # dap4\_fs\_pa7: rsvd2, pull-down, tristate-enable, input-disable  
pinmux.0x02446000 = 0x00000414; # cpu\_pwr\_req\_1\_pb1: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02441008 = 0x00022435; # ufs0\_ref\_clk\_pff0: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x02441000 = 0x00022435; # ufs0\_rst\_pff1: rsvd1, pull-down, tristate-enable, input-disable  
pinmux.0x02437020 = 0x00000415; # pex\_l0\_clkreq\_n\_pk0: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437028 = 0x00000415; # pex\_l0\_rst\_n\_pk1: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437010 = 0x00000415; # pex\_l1\_clkreq\_n\_pk2: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437018 = 0x00000415; # pex\_l1\_rst\_n\_pk3: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437000 = 0x00000415; # pex\_l2\_clkreq\_n\_pk4: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437030 = 0x00000415; # pex\_l2\_rst\_n\_pk5: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437038 = 0x00000415; # pex\_l3\_clkreq\_n\_pk6: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437040 = 0x00000415; # pex\_l3\_rst\_n\_pk7: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02437058 = 0x00000415; # sata\_dev\_slp\_pl3: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable  
pinmux.0x02440040 = 0x00000416; # dp\_aux\_ch2\_hpd\_pm2: rsvd2, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable  
pinmux.0x02440048 = 0x00000416; # dp\_aux\_ch3\_hpd\_pm3: rsvd2, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable  
pinmux.0x02440000 = 0x00000414; # soc\_gpio50\_pm5: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02440008 = 0x00000414; # soc\_gpio51\_pm6: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02440010 = 0x00000414; # soc\_gpio52\_pm7: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02440018 = 0x00000414; # soc\_gpio53\_pn0: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable  
pinmux.0x02440028 = 0x00000414; # soc\_gpio55\_pn2: rsvd0, pull-down, tristate-enable, input-disable, lpdr-disable

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 5:25am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/8 "2020-10-20T05:25:57Z")

</div>

the spreedsheet of DP0 and DP1 :

 ![image](https://global.discourse-cdn.com/nvidia/original/3X/8/8/882f7cacf2f15519a0c622abe3a7b9bb1d6237ba.png)

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 6:26am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/9 "2020-10-20T06:26:54Z")

</div>

Hi,

Could you enable nvdisplay w.r.t the port we are checking and disable all the other ports now?

Otherwise the log will be messed up together in dmesg and hard to read.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 6:35am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/10 "2020-10-20T06:35:03Z")

</div>

hi WayneWWW,  
what is the nvdiplay w.r.t the port and how to disable them,thanks.

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 6:38am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/11 "2020-10-20T06:38:13Z")

</div>

The display controller in dts is called nvdisplay.

Please check which nvidsplay is using the sor we are trying to check.

Keep it open and disable all the others.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 7:00am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/12 "2020-10-20T07:00:21Z")

</div>

Hi WayneWWW,  
found the problem is the schematics of hdmi wrong, DP\_TXD0\_P should be hdmi land2, that we degisn it as hdmi lane0.  
could DP\_TXD0\_P be modify ad hdmi lane0 by sw.  
Jumper it by hardware, and hdmi on DP0 can display.  
but HDMI on DP0 cannot show login seesion during bootup ,but HDMI on DP1 can show login seesion , Do it design so about this solution, the DP0 is just extented to display?

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 7:07am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/13 "2020-10-20T07:07:59Z")

</div>

> could DP\_TXD0\_P be modify ad hdmi lane0 by sw.

Search below setting in dts and swap the order to 0 1 2 3 4 can help.

> nvidia,xbar-ctrl

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 8:02am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/14 "2020-10-20T08:02:38Z")

</div>

Hi WayneWWW  
I change nvidia,xbar-ctrl from \<0x2 0x1 0x0 0x3 0x4\> to \<0x0 0x1 0x2 0x3 0x4\> of sor0 node in tegra194-soc-base.dtsi,  
both can display ,but hmdi on DP0 show normal , hdmi on DP1 block in nvidia logo;it is opposite .  
the dmesg log show:

nvidia-desktop login: [9.171019] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi  
[36.947297] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi  
[369.948847] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi  
[370.189825] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi  
[804.628180] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi  
[804.809122] tegradc 15210000.nvdisplay: dc\_hdmi\_out\_enable: couldn’t get regulator avdd\_hdmi

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 8:09am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/15 "2020-10-20T08:09:35Z")

</div>

If you don’t need that regulator, just set it to battery\_reg as a dummy one.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 8:53am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/16 "2020-10-20T08:53:02Z")

</div>

it need that regulator, modify nvidia,xbar-ctrl show both display,but one hdmi block during bootup just stop at nvidia logo .

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [October 20, 2020, 9:04am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/17 "2020-10-20T09:04:38Z")

</div>

Hi,

Please check hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-disp.dtsi and add the regulator there.

---

<div class="post-metadata">

**Author:** ![Big\_Z](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/big_z/32/462027_2.png) [@Big\_Z](https://forums.developer.nvidia.com/u/Big_Z)\
**Post date:** [October 20, 2020, 9:34am UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/18 "2020-10-20T09:34:58Z")

</div>

Hi WayneWWW  
nvidia,xbar-ctrl work

---

<div class="post-metadata">

**Author:** ![nadeemm](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/nadeemm/32/367020_2.png) [@nadeemm](https://forums.developer.nvidia.com/u/nadeemm)\
**Post date:** [October 18, 2021, 6:43pm UTC](https://forums.developer.nvidia.com/t/nx-dual-hdmi-setting/157390/20 "2021-10-18T18:43:02Z")

</div>

Closed on October 18, 2021, 6:43pm UTC