What is the ODM Data for cfg#5? I have gone through PLATFORM ADAPTATION AND BRING-UP GUIDE but was not able to determine the data.
Kindly suggest a solution.
What is the ODM Data for cfg#5? I have gone through PLATFORM ADAPTATION AND BRING-UP GUIDE but was not able to determine the data.
Kindly suggest a solution.
Update
I was able to get the ODM data as 0x2090000 and here is my code modification
gpio@2200000 {
sdmmc-wake-support-input {
status = "okay";
};
sdmmc-wake-support-output {
status = "okay";
};
pcie0_lane2_mux {
status = "okay";
};
};
fixed-regulators {
regulator@1 {
gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(P, 6) 0>;
};
};
sdhci@3400000 {
cd-gpios = <&tegra_main_gpio TEGRA_MAIN_GPIO(P, 5) 0>;
nvidia,cd-wakeup-capable;
};
i2c@3160000 {
ina3221x@40 {
channel@0 {
ti,shunt-resistor-mohm = <10>;
};
channel@1 {
ti,shunt-resistor-mohm = <10>;
};
};
ina3221x@41 {
channel@0 {
ti,shunt-resistor-mohm = <20>;
};
channel@1 {
ti,shunt-resistor-mohm = <10>;
};
channel@2 {
ti,rail-name = "VDD_SYS_DDR";
ti,shunt-resistor-mohm = <10>;
};
};
};
ahci-sata@3507000 {
gpios = <&spmic 7 0>;
};
pcie-controller@10003000 {
pci@1,0 {
nvidia,num-lanes = <2>;
status = "okay";
};
pci@2,0 {
nvidia,num-lanes = <1>;
status = "okay";
};
pci@3,0 {
nvidia,num-lanes = <1>;
status = "okay";
};
};
xhci@3530000 {
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
phy-names = "utmi-0", "utmi-1", "usb3-1", "usb3-1";
};
pinctrl@3520000 {
pinmux {
usb3-std-A-port2 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
e3325-usb3-std-A-HS {
status = "okay";
};
};
};
I was able to compile and flash my device but was not successful.
Is there any issue or am i missing something?
What do you means not successful?
vishwanath.nm,
Please do not write a phy name that does not have matched phys.
xhci@3530000 {
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
phy-names = "utmi-0", "utmi-1", <b>"usb3-1", "usb3-1";</b>
};
Please also refer:
https://elinux.org/Jetson/TX2_USB
@ShaneCC I was able to compile and flash the device but was not able to see any of the changes.
I have a custom carrier board which is designed for cfg#5. I could not detect any of the PCIe or USB lanes.
@WayneWWW I realized that mistake and corrected it, still no results.
You could check the runtime dtb by checking /proc/device-tree.