Only one frame of MIPI CSI input is received

Hi,

We are facing a problem very similar to

https://devtalk.nvidia.com/default/topic/1037809/jetson-tx2/jetpack3-2-1-tx2-csi-mipi-can-only-get-the-the-first-frame-of-image-but-tx1-works-fine-/

Our custom FPGA device outputting YUV422 format is connected to CSI-port 1 of Jetson TX1. We are using L4T V 28.1. We see that only one frame is updated every time we run the application.

Even after setting the chan->timeout to 200, only one frame is updated.

Is there a patch for the same? Or should we migrate to a different version?

hello kumar81,

according to https://devtalk.nvidia.com/default/topic/1037809/
your customer FPGA device should works with release-28.2.1 on Tx1
could you please migrate your driver to latest JetPack release,
thanks

Thank you @JerryChang for your response.

Migrating to new Jetpack will be a lot of effort as it involves a lot of testing on on-field device updates.

What is the issue? If there are some pointers, we can try to fix the issue in 28.1.

Thanks in advance.

hello kumar81,

we’ll still suggest to move your work to latest release,
however, please share the kernel message and also the VI tracing logs of your TX1 failure for more details.
thanks