Orin Endpoint slot power disabled on development kit

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
1

We followed docs on how to put the Orin in EP mode and now the slot on the Orin development kit doesn’t have 12v power. It starts out with 12v and then turns off. Do you know why? Did the dts files/ kernel only get updated for Root Complex mode and not Endpoint mode for slot power? Everything looks correct from following:
PCIe Endpoint Mode — Jetson Linux Developer Guide documentation but power seems to be disabled on boot when I do dmesg.
42.516555] vdd-12v-sys: disabling
[ 42.516597] vdd-3v3-ftdi: disabling
[ 42.516614] vdd-3v3-pcie: disabling
[ 42.516654] vdd-12v-pcie: disabling

Thank you for any input.
–Julia

3

Does the connector already connect between your RP with Orin EP?

We don’t support pcie hotplug.

4

Same problem here. In EP mode I don’t seem to get power on the slot. A few seconds after the Orin boots it disables the 12v pcie and 3v3 pcie.

5

I investigated to Orin endpoint mode problem a bit more.
When you follow the steps as described in this document an important step seems to be missing.
https://docs.nvidia.com/jetson/archives/r35.2.1/DeveloperGuide/text/SD/Communications/PcieEndpointMode.html

A change needs to be made to the kernel dtsi/dtb file which is not documented?
The system will log this warning when it boots:
[ 7.519074] tegra194-pcie 141a0000.pcie_ep: Failed to get PERST GPIO: -517

This older document provides a clue:
https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html#enable-pcie-in-a-customer-cvb-design

If the Tegra PCIe is operated in the endpoint mode, add the “reset-gpios” property with the gpio phandle, the gpio number connected to PERST# and flags(GPIO_ACTIVE_LOW).

How to change the dtsi/dtb file is missing from the newer r35.2.1 documentation.
An example of the required change would be great.

6

You can download the source code from

You can start from checking which dtb is in use on your board first. And trace the code will lead you to where the pcie is configured.

L4T developer guide has the kernel customization section to guide how to build the dts/dtsi into dtb.

8

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.