Orin nano Developer kit takes long time to boot

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
1

I have a Orin nano Developer kit board with system in SD card. When I power on the board, I found it took about 50 seconds to show the first Nvidia logo on screen. Why does the board take so long time and how can I reduce the boot time?

Below is my board and system information.
Software part of jetson-stats 4.2.1 - (c) 2023, Raffaello Bonghi
Model: NVIDIA Orin Nano Developer Kit - Jetpack 5.1.1 [L4T 35.3.1]
NV Power Mode[1]: 7W
Serial Number: [XXX Show with: jetson_release -s XXX]
Hardware:

  • 699-level Part Number: 699-13767-0005-300 K.2
  • P-Number: p3767-0005
  • Module: NVIDIA Jetson Orin Nano (Developer kit)
  • SoC: tegra23x
  • CUDA Arch BIN: 8.7
  • Codename: P3768
    Platform:
  • Machine: aarch64
  • System: Linux
  • Distribution: Ubuntu 20.04 focal
  • Release: 5.10.104-tegra
  • Python: 3.8.10
    jtop:
  • Version: 4.2.1
  • Service: Active
    Libraries:
  • CUDA: 11.4.315
  • cuDNN: 8.6.0.166
  • TensorRT: 8.5.2.2
  • VPI: 2.2.7
  • Vulkan: 1.3.204
  • OpenCV: 4.5.4 - with CUDA: YES
3

It seems the expected time to boot up with default L4T BSP package.

You could refer the following instruction to optimize boot time.
Boot Time Optimization — Jetson Linux Developer Guide documentation (nvidia.com)

Please provide the serial console log to check if there’s any error or unexpected delay during boot up.

4

@KevinFFF ,

The link you gave should be for kernel optimization. I feel the most boot time is not from kernel but before kernel. How to get serial console log with my dev kit board?

5

There’re several stages during boot up.
You could optimize them according to your use case and disable the unused driver/module/services.
For the UEFI, you could remove the 5s delay waiting for interrupt to enter boot menu.

Please refer to the following instruction.
Jetson Nano & NX Style - Serial Debug Console - JetsonHacks

6

@KevinFFF ,

I got serial log and also captured a video for you. FYI.

From the video, there are below obvious delay.

  1. At video time 00:03, delay about 5 seconds before UEFI
  2. from video time 00:08, UEFI start, it took about 6 seconds until L4TLauncher
  3. From video time 00:14, it took about 5 seconds from L4T launcher until Booting kernel. There is no boot logo showing on the screen. If boot logo is displayed by UEFI, it should display the boot logo on screen.
  4. Below are kernel delay, fist is from video time 00:19 to 00:21, it took about 2 seconds to wait for “switching to normal world boot”
  5. From video time 00:37 to 00:43, it took about 6 seconds in “using random host ethernet address”.
  6. Until 00:59, I saw the boot logo display on screen.

I will check the steps you gave to reduce kernel boot time, but before booting kernel, it have taken about 19 seconds, it is very long.

See attached 2 files are serial log and video.
Orin_boot_serial_log_20230517_113514.txt (87.1 KB)

7

Please refer to the FAQ in the following topic to remove 5s boot delay of UEFI:
Jetson AGX Orin FAQ - Jetson & Embedded Systems / Jetson AGX Orin - NVIDIA Developer Forums

May I know what’s the use case for your devkit to optimize the boot time? What functions do you want to keep?

8

We want to upgrade our product from Xavier NX to Orin nano. With Xavier NX chip, when power on, we can see boot logo about 10 - 12 seconds. But on Orin nano, we saw the first boot logo at about 50 seconds. That is too later. We expect we can also see the first boot logo at about 10 - 12 seconds when power on.

9

@KevinFFF ,

The link you gave can reduce 5 secons in my first delay: 1. At video time 00:03, delay about 5 seconds before UEFI, right?

Is there any way to reduce the other delays? Why the boot logo is displayed so later since it should be displayed by UEFI?

10

I had this problem too after setting up a new system directly using the SDK manager and JetPack 5.1.1. When I checked what was happening at boot time via the debug serial port I could see that the system was trying to boot from the network first. It tried IPv4 and then IPv6 (I can’t remember the exact protocol it was using) and took a long time to give up and try booting locally instead. When I booted with no network cable plugged in it quickly realised that network boot was not going to work and was much faster.
In the end I managed to change the boot order over the debug serial port in order to use local storage first to solve the problem.

11

@goad,

I also saw UEFI stuck on IPv4 and IPv6, then I change the UEFI boot order by moving SD boot to the top, this issue is gone.

But the boot time is still long as I said above.

12

Does your Xavier NX also run with Jetpack5.1.1(R35.3.1)?

13

No. My NX run with 4.6.1.

14

Could you help to verify the boot time for Xavier NX with JP5.1.1?

There’s many difference between JP4 and JP5, the significant one is about the bootloader, JP5 uses UEFI instead of cboot in JP4.

15

UEFI waits for 5 seconds for UEFI menu, also takes 6 seconds to L4TLaunch, then L4TLuancher takes 5 seconds to kernel booting. I will check the UEFI first. But the kernel also takes very long time (00:19 - 00:50).

I built a UEFI image to reduce 5 seconds delay and change L4TConfiguration.dts to move SD to boot priority. I want to flash those change to my board, but dont want to flash all. How can I just flash a few partitions to cover my change?

16

To optimize boot time of the kernel, you could disable the unused modules in kernel defconfig to reduce the probe time for drivers.

To change boot-order, you could just replace the L4TConfiguration.dtbo in your board.

17

I want to just flash uefi partition which should be in Orin nano module QSPI. Dont want to flash other parts.

I tried below command with “-k A_cpu-bootloader”, but did not work.

sudo ./tools/kernel_flash/l4t_initrd_flash.sh --external-device mmcblk1p1 -c tools/kernel_flash/flash_l4t_external.xml -p “-c bootloader/t186ref/cfg/flash_t234_qspi.xml” -k A_cpu-bootloader --showlogs --network usb0 jetson-orin-nano-devkit internal

18

Do you mean updating uefi_jetson.bin not work for removing 5s delay in UEFI?
If yes, it should be expected. You could refer to the following thread for details.
Optimizing UEFI boot time - #11 by KevinFFF

If you just want to update UEFI for Orin Nano, you could just run the following command.

$sudo ./flash.sh -c bootloader/t186ref/cfg/flash_t234_qspi.xml -k A_cpu-bootloader jetson-orin-nano-devkit mmcblk0p1
19

One thing is why I did not see UEFI boot logo shown out. UEFI exited in about 20 seconds, but I did not see any logo on screen.

20

I enabled UEFI debug, saw below error logs, may be related to display.

PROGRESS CODE: V03040003 I0
add-symbol-file /build/nvidia-uefi/Build/Jetson/DEBUG_GCC5/AARCH64/Silicon/NVIDIA/Drivers/NvDisplayControllerDxe/NvDisplayControllerDxe/DEBUG/NvDisplayControllerDxe.dll 0x240368000
Loading driver at 0x00240367000 EntryPoint=0x0024036EFE4 NvDisplayControllerDxe.efi
PROGRESS CODE: V03040002 I0

CreateFramebufferResource: no framebuffer region present
DeviceDiscoveryBindingStart, driver returned Not Found to start notification
CreateFramebufferResource: no framebuffer region present
DeviceDiscoveryBindingStart, driver returned Not Found to start notification
PROGRESS CODE: V03040003 I0
add-symbol-file /build/nvidia-uefi/Build/Jetson/DEBUG_GCC5/AARCH64/Silicon/NVIDIA/Drivers/FwImageDxe/FwImageDxe/DEBUG/FwImageDxe.dll 0x240080000
Loading driver at 0x00240070000 EntryPoint=0x00240084580 FwImageDxe.efi
PROGRESS CODE: V03040002 I0

21

I checked the UEFI code and the debug log. Framebuffer base/size information is from TEGRA_CPUBL_PARAMS. Below code is from function T234GetPlatformResourceInformation.

// Populate FrameBufferInfo
PlatformResourceInfo->FrameBufferInfo.Base = CPUBL_PARAMS (CpuBootloaderParams, CarveoutInfo[CARVEOUT_DISP_EARLY_BOOT_FB].Base);
PlatformResourceInfo->FrameBufferInfo.Size = CPUBL_PARAMS (CpuBootloaderParams, CarveoutInfo[CARVEOUT_DISP_EARLY_BOOT_FB].Size);

The error log “CreateFramebufferResource: no framebuffer region present” will be outputed only when either framebuffer base or size is 0. This can also be proved by the below log. There is no Carveout 39 data, 39 is CARVEOUT_DISP_EARLY_BOOT_FB.

So it should be framebuffer base/size are not set in TEGRA_CPUBL_PARAMS. How can framebuffer base/size are set in TEGRA_CPUBL_PARAMS?

Log:
DRAM Encryption Enabled
Carveout 1 Region: Base: 0x0000000268F00000, Size: 0x0000000000100000
Carveout 2 Region: Base: 0x000000026B800000, Size: 0x0000000000800000
Carveout 3 Region: Base: 0x000000026B000000, Size: 0x0000000000800000
Carveout 4 Region: Base: 0x0000000268E00000, Size: 0x0000000000100000
Carveout 5 Region: Base: 0x0000000268D00000, Size: 0x0000000000100000
Carveout 6 Region: Base: 0x000000026A800000, Size: 0x0000000000800000
Carveout 7 Region: Base: 0x0000000269400000, Size: 0x0000000000400000
Carveout 8 Region: Base: 0x0000000268C00000, Size: 0x0000000000100000
Carveout 9 Region: Base: 0x0000000268B00000, Size: 0x0000000000100000
Carveout 10 Region: Base: 0x000000026A000000, Size: 0x0000000000800000
Carveout 11 Region: Base: 0x000000004007A000, Size: 0x0000000000002000
Carveout 13 Region: Base: 0x000000004007C000, Size: 0x0000000000002000
Carveout 14 Region: Base: 0x000000004007E000, Size: 0x0000000000002000
Carveout 15 Region: Base: 0x0000000268A00000, Size: 0x0000000000100000
Carveout 16 Region: Base: 0x0000000040078000, Size: 0x0000000000002000
Carveout 17 Region: Base: 0x0000000268900000, Size: 0x0000000000100000
Carveout 18 Region: Base: 0x0000000040076000, Size: 0x0000000000002000
Carveout 20 Region: Base: 0x0000000272000000, Size: 0x0000000002000000
Carveout 21 Region: Base: 0x0000000040074000, Size: 0x0000000000002000
Carveout 22 Region: Base: 0x000000026D000000, Size: 0x0000000001000000
Carveout 23 Region: Base: 0x000000026C000000, Size: 0x0000000000200000
Carveout 24 Region: Base: 0x0000000270000000, Size: 0x0000000002000000
Carveout 25 Region: Base: 0x0000000040072000, Size: 0x0000000000002000
Carveout 27 Region: Base: 0x0000000268800000, Size: 0x0000000000100000
Carveout 28 Region: Base: 0x000000026E000000, Size: 0x0000000002000000
Carveout 30 Region: Base: 0x0000000040000000, Size: 0x0000000000040000
Carveout 31 Region: Base: 0x0000000278000000, Size: 0x0000000008000000
Carveout 33 Region: Base: 0x0000000269000000, Size: 0x0000000000400000
Carveout 34 Region: Base: 0x0000000268670000, Size: 0x0000000000010000
Carveout 35 Region: Base: 0x000000026C200000, Size: 0x0000000000E00000
Carveout 38 Region: Base: 0x0000000080000000, Size: 0x00000001E8670000
Carveout 40 Region: Base: 0x0000000040070000, Size: 0x0000000000002000
Carveout 42 Region: Base: 0x0000000268700000, Size: 0x0000000000100000
Carveout 43 Region: Base: 0x0000000274000000, Size: 0x0000000004000000