Orin NX: MB2 cannot find any slaves

I was working on UEFI Secure Boot by writing fuses, but now the system is showing “I2C: slave not found in slaves.” from MB2 and fails to boot up.

Could you help me identify the cause of this issue? If it’s a hardware problem, that’s somewhat acceptable (although not ideal), but if it’s caused by the way fuses or flash memory were written, I need to correct the procedure.

Here is the log output from that time.

[0053.126] I> MB1 (version: 1.2.0.0-t234-54845784-562369e5)
[0053.132] I> t234-A01-0-Silicon (0x12347) Prod
[0053.136] I> Boot-mode : Coldboot
[0053.139] I> Entry timestamp: 0x00000000
[0053.143] I> last_boot_error: 0x0
[0053.146] I> BR-BCT: preprod_dev_sign: 0
[0053.150] I> rst_source: 0xb, rst_level: 0x1
[0053.154] I> Task: SE error check
[0053.157] I> Task: Bootchain select WAR set
[0053.161] I> Task: Enable SLCG
[0053.164] I> Task: CRC check
[0053.167] I> Task: Initialize MB2 params
[0053.171] I> MB2-params @ 0x40060000
[0053.175] I> Task: Crypto init
[0053.177] I> Task: Perform MB1 KAT tests
[0053.181] I> Task: NVRNG health check
[0053.185] I> NVRNG: Health check success
[0053.189] I> Task: MSS Bandwidth limiter settings for iGPU clients
[0053.195] I> Task: Enabling and initialization of Bandwidth limiter
[0053.201] I> No request to configure MBWT settings for any PC!
[0053.206] I> Task: Secure debug controls
[0053.210] I> Task: strap war set
[0053.213] I> Task: Initialize SOC Therm
[0053.217] I> Task: Program NV master stream id
[0053.221] I> Task: Verify boot mode
[0053.227] I> Task: Alias fuses
[0053.231] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0053.238] I> Task: Print SKU type
[0053.241] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c0
[0053.246] I> FUSE_OPT_GPC_DISABLE = 0x00000002
[0053.250] I> FUSE_OPT_TPC_DISABLE = 0x000000f0
[0053.255] I> FUSE_OPT_DLA_DISABLE = 0x00000000
[0053.259] I> FUSE_OPT_PVA_DISABLE = 0x00000000
[0053.263] I> FUSE_OPT_NVENC_DISABLE = 0x00000000
[0053.268] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0053.272] I> FUSE_OPT_FSI_DISABLE = 0x00000001
[0053.276] I> FUSE_OPT_EMC_DISABLE = 0x00000000
[0053.281] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0053.285] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0053.289] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0053.293] I> FUSE_SKU_INFO_0 = 0xd3
[0053.296] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS 
[0053.301] I> FUSE_PACKAGE_INFO_0 = 0x2
[0053.304] I> SKU: Prod
[0053.306] I> Task: Boost clocks
[0053.309] I> Initializing PLLC2 for AXI_CBB.
[0053.314] I> AXI_CBB : src = 35, divisor = 0
[0053.318] I> Task: Voltage monitor
[0053.321] I> VMON: Vmon re-calibration and fine tuning done
[0053.326] I> Task: UPHY init
[0053.331] I> HSIO UPHY init done
[0053.334] W> Skipping GBE UPHY config
[0053.338] I> Task: Boot device init
[0053.341] I> Boot_device: RCM
[0053.344] I> USB configuration success
[0053.348] I> Task: TSC init
[0053.351] I> Task: Load membct
[0053.354] I> RAM_CODE 0x4000401
[0053.357] I> Loading MEMBCT 
[0053.359] I> Slot: 0
[0053.361] I> Binary[0] block-0 (partition size: 0x40000)
[0053.367] I> Binary name: MEM-BCT-0
[0053.370] I> Size of crypto header is 8192
[0053.374] I> Size of crypto header is 8192
[0053.378] I> BCH of MEM-BCT-0 read from storage
[0053.382] I> BCH address is : 0x40050000
[0053.386] I> MEM-BCT-0 header integrity check is success
[0053.391] I> Binary magic in BCH component 0 is MEM0
[0053.396] I> component binary type is 0
[0053.402] I> MEM-BCT-0 binary is read from storage
[0053.407] I> MEM-BCT-0 binary integrity check is success
[0053.412] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0053.419] I> RAM_CODE 0x4000401
[0053.426] I> RAM_CODE 0x4000401
[0053.430] I> Task: Load Page retirement list
[0053.434] I> Task: SDRAM params override
[0053.438] I> Task: Save mem-bct info
[0053.442] I> Task: Carveout allocate
[0053.445] I> Update CCPLEX IST carveout from MB1-BCT
[0053.450] I> ECC region[0]: Start:0x0, End:0x0
[0053.454] I> ECC region[1]: Start:0x0, End:0x0
[0053.458] I> ECC region[2]: Start:0x0, End:0x0
[0053.463] I> ECC region[3]: Start:0x0, End:0x0
[0053.467] I> ECC region[4]: Start:0x0, End:0x0
[0053.471] I> Non-ECC region[0]: Start:0x80000000, End:0x480000000
[0053.477] I> Non-ECC region[1]: Start:0x0, End:0x0
[0053.482] I> Non-ECC region[2]: Start:0x0, End:0x0
[0053.486] I> Non-ECC region[3]: Start:0x0, End:0x0
[0053.491] I> Non-ECC region[4]: Start:0x0, End:0x0
[0053.502] I> allocated(CO:43) base:0x47c000000 size:0x4000000 align: 0x200000
[0053.509] I> allocated(CO:39) base:0x479e00000 size:0x2200000 align: 0x10000
[0053.516] I> allocated(CO:20) base:0x476000000 size:0x2000000 align: 0x2000000
[0053.523] I> allocated(CO:24) base:0x474000000 size:0x2000000 align: 0x2000000
[0053.530] I> allocated(CO:28) base:0x472000000 size:0x2000000 align: 0x2000000
[0053.537] I> allocated(CO:22) base:0x478000000 size:0x1000000 align: 0x1000000
[0053.544] I> allocated(CO:35) base:0x479000000 size:0xe00000 align: 0x10000
[0053.551] I> allocated(CO:02) base:0x471800000 size:0x800000 align: 0x800000
[0053.558] I> allocated(CO:03) base:0x471000000 size:0x800000 align: 0x800000
[0053.565] I> allocated(CO:06) base:0x470800000 size:0x800000 align: 0x800000
[0053.572] I> allocated(CO:56) base:0x470000000 size:0x800000 align: 0x200000
[0053.579] I> allocated(CO:07) base:0x46fc00000 size:0x400000 align: 0x400000
[0053.586] I> allocated(CO:33) base:0x46f800000 size:0x400000 align: 0x200000
[0053.593] I> allocated(CO:23) base:0x46f600000 size:0x200000 align: 0x200000
[0053.600] I> allocated(CO:01) base:0x46f500000 size:0x100000 align: 0x100000
[0053.607] I> allocated(CO:04) base:0x46f400000 size:0x100000 align: 0x100000
[0053.614] I> allocated(CO:05) base:0x46f300000 size:0x100000 align: 0x100000
[0053.621] I> allocated(CO:08) base:0x46f200000 size:0x100000 align: 0x100000
[0053.627] I> allocated(CO:09) base:0x46f100000 size:0x100000 align: 0x100000
[0053.634] I> allocated(CO:15) base:0x46f000000 size:0x100000 align: 0x100000
[0053.641] I> allocated(CO:17) base:0x46ef00000 size:0x100000 align: 0x100000
[0053.648] I> allocated(CO:27) base:0x46ee00000 size:0x100000 align: 0x100000
[0053.655] I> allocated(CO:42) base:0x46ed00000 size:0x100000 align: 0x100000
[0053.662] I> allocated(CO:54) base:0x46ec80000 size:0x80000 align: 0x80000
[0053.669] I> allocated(CO:34) base:0x46ec70000 size:0x10000 align: 0x10000
[0053.676] I> allocated(CO:72) base:0x46ea70000 size:0x200000 align: 0x10000
[0053.683] I> allocated(CO:46) base:0x440000000 size:0x20000000 align: 0x20000000
[0053.690] I> allocated(CO:47) base:0x46e600000 size:0x400000 align: 0x200000
[0053.697] I> allocated(CO:48) base:0x46ea50000 size:0x20000 align: 0x10000
[0053.704] I> allocated(CO:69) base:0x46ea30000 size:0x20000 align: 0x10000
[0053.710] I> allocated(CO:49) base:0x46ea20000 size:0x10000 align: 0x10000
[0053.717] I> allocated(CO:50) base:0x46ea10000 size:0x10000 align: 0x10000
[0053.724] I> NSDRAM base: 0x80000000, end: 0x46ea70000, size: 0x3eea70000
[0053.731] I> Task: Thermal check
[0053.734] I> max_chip_limit = 105
[0053.737] I> min_chip_limit = -28
[0053.740] I> max temp read = 53
[0053.743] I> min temp read = 51
[0053.746] I> Task: Update FSI SCR with thermal fuse data
[0053.751] I> Task: Enable WDT 5th expiry
[0053.755] I> Task: I2C register
[0053.758] I> Task: Set I2C bus freq
[0053.761] I> Task: Reset FSI
[0053.764] I> Task: Pinmux init
[0053.767] I> skipped mmio_addr = 0x9240008
[0053.771] I> skipped mmio_addr = 0x9240000
[0053.775] I> skipped mmio_addr = 0x9240010
[0053.779] I> skipped mmio_addr = 0x9240018
[0053.783] I> skipped mmio_addr = 0x9240020
[0053.787] I> skipped mmio_addr = 0x9240030
[0053.791] I> skipped mmio_addr = 0x9240028
[0053.795] I> skipped mmio_addr = 0x9240038
[0053.799] I> skipped mmio_addr = 0x9240040
[0053.803] I> skipped mmio_addr = 0x9240048
[0053.807] I> skipped mmio_addr = 0x9241000
[0053.810] I> skipped mmio_addr = 0x9241008
[0053.814] I> skipped mmio_addr = 0x9241010
[0053.818] I> skipped mmio_addr = 0x9241018
[0053.822] I> skipped mmio_addr = 0x9241020
[0053.826] I> skipped mmio_addr = 0x9241028
[0053.830] I> skipped mmio_addr = 0x9241030
[0053.834] I> skipped mmio_addr = 0x9241038
[0053.838] I> skipped mmio_addr = 0x9241040
[0053.842] I> skipped mmio_addr = 0x9242000
[0053.846] I> skipped mmio_addr = 0x9242008
[0053.850] I> Task: Prod config init
[0053.853] I> Task: Pad voltage init
[0053.857] I> Task: Prod init
[0053.859] I> Task: Program rst req config reg
[0053.864] I> Task: Common rail init
[0053.867] I> DONE: Thermal config
[0053.871] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.
[0053.879] I> DONE: SOC rail config
[0053.883] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.
[0053.889] I> DONE: MEMIO rail config
[0053.893] W> PMIC_CONFIG: Rail: GPU rail info not found in MB1 BCT.
[0053.899] I> DONE: GPU rail info
[0053.903] W> PMIC_CONFIG: Rail: CV rail info not found in MB1 BCT.
[0053.909] I> DONE: CV rail info
[0053.912] I> Task: Mem clock src
[0053.915] I> Task: Misc. board config
[0053.919] I> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0053.925] I> Task: SDRAM init
[0053.927] I> MemoryType: 4 MemBctRevision: 1
[0053.934] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 1
[0053.941] I> MSS CAR: Init PLLM
[0053.945] I> MSS CAR: Init PLLHUB
[0053.949] I> Encryption:   MTS: en, TX: en, VPR: en, GSC: en
[0053.961] I> SDRAM initialized!
[0053.964] I> SDRAM Size in Total 0x400000000
[0053.968] I> Task: Dram Ecc scrub
[0053.971] I> Task: DRAM alias check
[0053.987] I> Task: Program NSDRAM carveout
[0053.991] I> NSDRAM carveout encryption is enabled
[0053.997] I> Program NSDRAM carveout
[0054.001] I> Task: Register checker
[0054.006] I> Task: Enable clock-mon
[0054.011] I> FMON: Fmon re-programming done
[0054.016] I> Task: Mapper init
[0054.019] I> Task: SC7 Context Init
[0054.023] I> Task: CCPLEX IST init
[0054.027] I> Task: CPU WP0
[0054.031] I> Loading MCE
[0054.033] I> Slot: 0
[0054.036] I> Binary[8] block-134217728 (partition size: 0x80000)
[0054.043] I> Binary name: MCE
[0054.047] I> Size of crypto header is 8192
[0054.051] I> Size of crypto header is 8192
[0057.243] I> BCH of MCE read from storage
[0057.247] I> BCH address is : 0x4003e000
[0057.253] I> MCE header integrity check is success
[0057.258] I> Binary magic in BCH component 0 is MTSM
[0057.263] I> component binary type is 8
[0057.267] I> Size of crypto header is 8192
[0057.281] I> MCE binary is read from storage
[0057.286] I> MCE binary integrity check is success
[0057.291] I> Binary MCE loaded successfully at 0x40000000 (0x2c880)
[0057.299] I> Size of crypto header is 8192
[0057.304] I> Sending WP0 mailbox command to PSC
[0057.316] I> Task: XUSB Powergate
[0057.320] I> Skipping powergate XUSB.
[0057.324] I> Task: MB1 fixed firewalls
[0057.340] W> Firewall readback mismatch
[0057.350] I> Task: Load bpmp-fw
[0057.354] I> Slot: 0
[0057.357] I> Binary[15] block-251658240 (partition size: 0x180000)
[0057.364] I> Binary name: BPMP_FW
[0057.368] I> Size of crypto header is 8192
[0057.373] I> Size of crypto header is 8192
[0057.378] I> BCH of BPMP_FW read from storage
[0057.382] I> BCH address is : 0x807fe000
[0057.388] I> BPMP_FW header integrity check is success
[0057.394] I> Binary magic in BCH component 0 is BPMF
[0057.399] I> component binary type is 15
[0057.403] I> Size of crypto header is 8192
[0057.456] I> BPMP_FW binary is read from storage
[0057.463] I> BPMP_FW binary integrity check is success
[0057.469] I> Binary BPMP_FW loaded successfully at 0x80000000 (0xfea00)
[0057.477] I> Slot: 0
[0057.479] I> Binary[16] block-268435456 (partition size: 0x400000)
[0057.487] I> Binary name: BPMP_FW_DTB
[0057.491] I> Size of crypto header is 8192
[0057.496] I> Size of crypto header is 8192
[0057.501] I> BCH of BPMP_FW_DTB read from storage
[0057.506] I> BCH address is : 0x807fc000
[0057.511] I> BPMP_FW_DTB header integrity check is success
[0057.517] I> Binary magic in BCH component 0 is BPMD
[0057.523] I> component binary type is 16
[0057.527] I> Size of crypto header is 8192
[0057.543] I> BPMP_FW_DTB binary is read from storage
[0057.550] I> BPMP_FW_DTB binary integrity check is success
[0057.555] I> Binary BPMP_FW_DTB loaded successfully at 0x807bed70 (0x3d280)
[0057.564] I> Task: Load psc-fw
[0057.568] I> Slot: 0
[0057.571] I> Binary[17] block-285212672 (partition size: 0xc0000)
[0057.578] I> Binary name: PSC_FW
[0057.582] I> Size of crypto header is 8192
[0057.587] I> Size of crypto header is 8192
[0057.592] I> BCH of PSC_FW read from storage
[0057.596] I> BCH address is : 0x80ffe000
[0057.602] I> PSC_FW header integrity check is success
[0057.607] I> Binary magic in BCH component 0 is PFWP
[0057.613] I> component binary type is 17
[0057.617] I> Size of crypto header is 8192
[0057.639] I> PSC_FW binary is read from storage
[0057.645] I> PSC_FW binary integrity check is success
[0057.650] I> Binary PSC_FW loaded successfully at 0x80fa4680 (0x59980)
[0057.659] I> Task: Load nvdec-fw
[0057.662] I> Slot: 0
[0057.665] I> Binary[7] block-117440512 (partition size: 0x100000)
[0057.673] I> Binary name: NVDEC
[0057.676] I> Size of crypto header is 8192
[0057.681] I> Size of crypto header is 8192
[0057.686] I> BCH of NVDEC read from storage
[0057.690] I> BCH address is : 0x800fe000
[0057.696] I> NVDEC header integrity check is success
[0057.701] I> Binary magic in BCH component 0 is NDEC
[0057.707] I> component binary type is 7
[0057.711] I> Size of crypto header is 8192
[0057.729] I> NVDEC binary is read from storage
[0057.734] I> NVDEC binary integrity check is success
[0057.740] I> Binary NVDEC loaded successfully at 0x80000000 (0x46000)
[0057.753] I> Task: Load tsec-fw
[0057.756] I> TSEC-FW load support not enabled
[0057.761] I> Task: GPIO interrupt map
[0057.765] I> Task: SC7 context save
[0057.769] I> Task: Load MB2/Applet/FSKP
[0057.774] I> Loading MB2
[0057.777] I> Slot: 0
[0057.779] I> Binary[6] block-100663296 (partition size: 0x80000)
[0057.787] I> Binary name: MB2
[0057.790] I> Size of crypto header is 8192
[0057.795] I> Size of crypto header is 8192
[0057.800] I> BCH of MB2 read from storage
[0057.804] I> BCH address is : 0x8007e000
[0057.810] I> MB2 header integrity check is success
[0057.815] I> Binary magic in BCH component 0 is MB2B
[0057.820] I> component binary type is 6
[0057.824] I> Size of crypto header is 8192
[0057.849] I> MB2 binary is read from storage
[0057.855] I> MB2 binary integrity check is success
[0057.860] I> Binary MB2 loaded successfully at 0x80000000 (0x691f0)
[0057.868] I> Task: Map CCPLEX SHARED carveout
[0057.873] I> Task: Prepare MB2 params
[0057.878] I> BR-BCT Boot Chain Fields
[0057.882] I>    u32_non_gpio_select_boot_chain  : 0
[0057.887] I>    u32_num_boot_chains             : 2
[0057.893] I>    bf_bl_gpio_select_boot_chain_1b : 0
[0057.898] I> Task: Dram ecc test
[0057.902] I> Task: Misc NV security settings
[0057.907] I> NVDEC sticky bits programming done
[0057.912] I> Successfully powergated NVDEC
[0057.916] I> Task: Disable/Reload WDT
[0057.920] I> Task: Program misc carveouts
[0057.925] I> Program IPC carveouts
[0057.933] I> SLCG Global override status := 0x0
[0057.938] I> MB1: MSS reconfig completed
I> MB2 (version: 0.0.0.0-t234-54845784-4d0906e6)
I> t234-A01-0-Silicon (0x12347)
I> Boot-mode : RCM BOOT
I> Emulation: 
I> Entry timestamp: 0x0374cc48
I> Regular heap: [base:0x40040000, size:0x10000]
I> DMA heap: [base:0x470000000, size:0x800000]
I> Task: ARI update carveout TZDRAM (0x50002034)
I> Task: Enable hot-plug capability (0x50028064)
I> Task: Set blob address (0x5000200c)
I> Task: PSC mailbox init (0x500178b0)
I> Task: Crypto init (0x5000675c)
I> Task: Enable GP-SE clock (0x50002198)
I> Task: DICE Identity init (0x5001af00)
I> DICE is not enabled.
I> Task: Measured Boot init (0x5001b674)
I> Task: I2C register (0x50001ff8)
I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout (0x50001fe0)
I> Task: Program CBB PCIE AMAP regions (0x5001ac14)
I> Task: Load and authenticate registered FWs (0x5001e198)
I> Task: Load AUXP FWs (0x50027c04)
I> Successfully register SPE FW load task with MB2 loader
I> Skipping SCE FW load
I> Successfully register RCE FW load task with MB2 loader
I> Successfully register DCE FW load task with MB2 loader
I> Unpowergating APE
I> Unpowergate done
I> Successfully register APE FW load task with MB2 loader
I> Skipping FSI FW load
I> Successfully register XUSB FW load task with MB2 loader
I> ECDSA P521 signature check: OK
I> KDF derivation: OK
I> KDF derivation: OK
I> GCM decryption: OK
I> spe: Authentication Finalize Done
I> Binary spe loaded successfully at 0x46f200000
I> ECDSA P521 signature check: OK
I> KDF derivation: OK
I> KDF derivation: OK
I> GCM decryption: OK
I> rce: Authentication Finalize Done
I> Binary rce loaded successfully at 0x46ef00000
I> ECDSA P521 signature check: OK
I> KDF derivation: OK
I> KDF derivation: OK
I> GCM decryption: OK
I> dce: Authentication Finalize Done
I> Binary dce loaded successfully at 0x476000000
I> ECDSA P521 signature check: OK
I> KDF derivation: OK
I> KDF derivation: OK
I> GCM decryption: OK
I> ape: Authentication Finalize Done
I> Binary ape loaded successfully at 0x46fc00000
I> ECDSA P521 signature check: OK
I> KDF derivation: OK
I> KDF derivation: OK
I> GCM decryption: OK
I> xusb: Authentication Finalize Done
I> Binary xusb loaded successfully at 0x46f300000
I> Task: Carveout setup (0x500208f8)
I> Program remaining OEM carveouts
I> Task: Enable FSI VMON (0x50017280)
I> Task: Restore XUSB sec (0x50001ef8)
I> Task: Enable FSI SE clock (0x50017d0c)
I> Task: Initialize SBSA UART CAR (0x500020fc)
I> Task: Initialize CPUBL Params (0x50018cf8)
I> CPUBL-params @ 0x472000000
I> Task: Prepare eeprom data (0x50018ac4)
E> I2C: slave not found in slaves.
E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
E> I2C_DEV: Failed to send register address 0x00000000.
E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x00000000 via instance 0.
E> eeprom: Failed to read I2C slave device
C> Task 0x0 failed (err: 0x1f1e050d)
E> Top caller module: I2C_DEV, error module: I2C, reason: 0x0d, aux_info: 0x05
I> Busy Spin

Hi kushiki.yusuke,

Please update the log as file here instead of pasting whole content for better reading.

Are you using the devkit or custom board for AGX Orin?
What’s your Jetpack version in use?

Sorry that I’m not clear about this.
For the fuse, you have to specify PKC+SBK for Secureboot. It is different from UEFI secureboot.
Could you flash the board w/o enabling Secureboot and UEFI secureboot?

Hi KevinFFF,

I’ve attached the log file. com4log240926.txt (33.3 KB)

It’s in raw format and not well-organized, so it might not be very easy to read.
The pasted log is at the end of the log file.

Are you using the devkit or custom board for AGX Orin? What’s your Jetpack version in use?

I am using the Orin NX module and connecting it with the “Photon” board manufactured by Connect Tech.

To rule out a board issue, I connected the Orin NX module that has the issue to another working board and confirmed the same issue occurred.

JetPack version is 5.1.2.

UEFI Secure Boot by writing fuses

I’m not entirely sure if this is correct as I’m still trying to fully understand it,
but I used the PKC+SBK that I wrote to the fuses for Secure Boot during the UEFI secure boot configuration.

[0164.721] W> Firewall readback mismatch
..
E> Error in command_complete 18000 int_status
E> OCR failed, error = 39390706
E> Failed to open sdmmc-3, err = 39390706

There’re errors in MB1.

Could you share the steps how you enable Secureboot(PKC + SBK)?

Do you have the devkit to reproduce the same issue?

What do you mean about the “working board”?
Do you mean that there’s another board works with secureboot and UEFI secureboot enabled?

Hi KevinFFF,

Could you share the steps how you enable Secureboot(PKC + SBK)?

Attached shell script represents my steps to burn PKC+SBK.
xa-flash.sh.txt (5.1 KB)

Do you have the devkit to reproduce the same issue?

Is devkit the product produced by Nvidia?
Unfortunately I don’t have it.

What do you mean about the “working board”?

I have 3 boards produced by Connetct Tech.

Our development bench is built from (1)Connect Tech board and (2)Orin NX module.

(1) NGX002 Photon AI Camera Platform for NVIDIA® Jetson Orin™ NX - Connect Tech Inc.

(2) P3767 NVIDIA Jetson Orin Nano 4GB - 900-13767-0040-000

Do you mean that there’s another board works with secureboot and UEFI secureboot enabled?

I moved (2) to 2nd (1).
But, the issue was reproduced. MB2 didn’t find EEPROM and not boot up properly.