DTS is set as follows.
pixel_phase = “uyvy”;
active_w = “1920”;
active_h = “1200”;
serdes_pix_clk_hz = “225000000”;
pix_clk_hz = “69120000”
//1920x1200x30 (width * height * frame rate)
//serdes_pix_clk_hz = (deserializer output data rate in hertz) * (number of CSI lanes) / (bits per pixel).
//serdes_pix_clk_hz = (1800000000*2)/16 == 225000000
I attached whole dts setting tegra234-p3737-camera-imx390-overlay.dts.txt (48.6 KB)
“Thanks to JerryChang and ShaneCCC”
I have previously ported a 8-channel camera successfully where all settings were the same except for the resolution.
I know how to set up DTS and have successfully previewed it before.
Resolution changed from 1920x1080 to 1920x1200
Please review serdes_pix_clk_hz and pix_clk_hz are correct.
I attached “cat /sys/kernel/debug/tracing/trace”'s result trace.txt (63.2 MB)
I changed setting as below
I set pix_clk_hz and serdes_pix_clk_hz as below according to
NVIDIA’s guide
pix_clk_hz = “69120000”;
// 1920120030
serdes_pix_clk_hz = “187500000”;
//serdes_pix_clk_hz = (deserializer output data rate in hertz) * (number of CSI lanes) / (bits per pixel).
(15000000002)/16 == 187500000
I set pix_clk_hz and serdes_pix_clk_hz as below according to NVIDIA’s guide
pix_clk_hz = “69120000”;
// 1920120030
serdes_pix_clk_hz = “187500000”;
//serdes_pix_clk_hz = (deserializer output data rate in hertz) * (number of CSI lanes) / (bits per pixel).
(15000000002)/16 == 187500000
** Thank you for your prompt response **
Camera vender share MIPI clock which 576Mhz per lane.
The Cam has 4 lanes
According to MIPI clock, I calculated pix_clk_hz and serdes_pix_clk_hz as below
The cam use 4 lane, so total bandwith 4*576 = 2,304Mhz
Than
For CSI 0, Total bandwidth of CAM A and CAM B 2,304*2 = 4,608 to 96712
96712 out 4,608 by 2 lane to CSI0, so 96712’s DPHY data rate/lane is 2.4G
for margin I set 96712’s DPHY data rate/lane as 2.5G
I set pix_clk_hz = “144000000”;
Using sensor CSI lane output rate:
pixel_clk_hz = sensor data rate per lane (Mbps) * number of lanes / bits per pixel
may I know which Jetpack release version you’re now using?
please check $ cat /etc/nv_tegra_release for verification.
and… it looks you’ve some duplicated position property of your camera modules.
please refer to Module Properties for reference settings.
let’s also check whether it’s related to system performance,
please try below commands to boost all the VI/CSI/ISP clocks, (you may ignore ISP since you’re using YUV sensor)
sudo su
echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/emc/mrq_rate_locked
cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/isp/rate
cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate
i’m wondering this is related to dislocation issue.
could you please check it’s always the same locate of stripes? you may try moving one of sensor to capture with checkerboard for examination.
Hello JerryChang
It’s always the same location of stripes. I checked by previewing the image for several minutes.
It’s working file per one camera per once csi but like below.
Two cameras per CSI , It’s working abnormal.
I am thiking this issue about data rate .
the cam’s PHY DPLL is 576Mhz per lane
The cam use 4 lane, so total bandwith 4576 = 2,304Mhz
Than
For CSI 0, Total bandwidth of CAM A and CAM B 2,3042 = 4,608 to 96712
96712 out 4,608 by 2 lane to CSI0, so 96712’s DPHY data rate/lane as 2.4G
The max 96712’s DPHY data rate/lane is 2.4G
So I tested both 2.4G and 2.5G.
2.5G is better than 2.4G
Is there need margin to operate cam and 96712 ?
Because even if I set dpll as 2.5G, the margin is smaller than 10%
Hello Jerry Chang
I have two deserializer which are two 96712s.
first one’s test result is what I mentioned before .
With Same settings. I test second one.
The preview image is freezing.
Image’s position is chaging as below
The dts settig is verfied with the other cameras with 8 channel.
I attached “cat /sys/kernel/debug/tracing/trace”'s result MobaXterm_COM39USBSerialPortCOM39_20250122_173557.txt (410.4 KB)
Could you please check the logs and the observed phenomena?
I always appreciate your kind and prompt responses.
This is the third type of camera I am porting.
I successfully ported the previous two types of cameras with your help.
Thank you again!
you may revise SerDes chip output configure to match your sensor output as well.
for instance, your sensor configure is 1920x1200, but it looks your SerDes chip output configure is 7680x1200.
did they using different CSI bricks? please also check you’re mapping them to different VI as well.
