Outbound doesn't work when to other Jetson?

the PCIE topology is: X86 as RC + PCIE switch + Jetson AGX Xavier A + Jetson AGX Xavier B

RC’s ddr 0x100000000-0x109fffffff : System RAM

Jetson AGX Xavier A
lspci -s 1b:00.0 -xv
Memory at 387f80000000 (64-bit, prefetchable) [size=1G]

Jetson AGX Xavier B
lspci -s 1d:00.0 -xv
0000:1d:00.0 RAM memory: NVIDIA Corporation Device 0002
Memory at 387f00000000 (64-bit, prefetchable) [size=1G]

configure the outbound with:
void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
u64 cpu_addr, u64 pci_addr, u32 size)

which
index = 0,
type = PCIE_ATU_TYPE_MEM
size = 64M
cpu_addr = 0x1c00100000

@ Jetson AGX Xavier A
1.
pci_addr = 0x100000000 (RC’s ddr)
busybox devmem 0x1c00100000
R/W ok
2.
pci_addr = 0x387f00000000 (Jetson AGX Xavier B BAR0 PCIE bus address)
busybox devmem 0x1c00100000
0xFFFFFFFF
busybox devmem 0x1c00100000 32 0x1
busybox devmem 0x1c00100000
0xFFFFFFFF

R/W both fail

but
3. @RC
busybox devmem 0x387f00000000
0x3138444A

busybox devmem 0x387f00000000 32 0x1
busybox devmem 0x387f00000000
0x00000001

@ Jetson AGX Xavier A, we can configure the outbound to access the RC, but NOT to other Jetson.
and the RC can access the two jetson, which show PCIE switch works well.
Is there limitation for the pci_address when configure outbound dw_pcie_prog_outbound_atu?

thanks.

We figured it out, that PCIE switch need configure to support peer-to-peer.
now It works.

thanks.

Your assessment is correct. The PCIe switch in this case needs to be configured to have peer-to-peer enabled.

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