Is the OVERTEMP_N signal driven out to the carrier board or expected to be driven in?

Hi, it is out from module to carrier board.


Then why is it defined as GPIO3_PN.02, input, with internal PU activated, in the pinmux file? Ball L52

And in the SOM datasheet no direction is given.

Thanks eric, it is an INPUT signal to Tegra chip. The signal direction in schematic will be corrected.


NVidia answers are opposite and confuse all of us, so let’s try to clear things out:

  • what is triggering this signal? SOM, carrier board, else?
  • who is responding to this signal? what actions? carrier board/power-off, SOM PMIC/reset, else?

My assumption was that this is coming from the SOM, in case of overheat in the application processor die itself (thermal throttling = critical), so that the carrier board (or custom board) can shutdown the system.


The pin is available as an INPUT from the carrier board if a force shutdown is required.