We have read through your documentation and concerns about a PCB reference heat sink attachment and was wondering if there are any other concerns that your team has on this approach outside of thermal and strain?
The pros and cons of PCB Referenced heat sink and Die Referenced heatsink are given in the Thermal Design Guide https://developer.nvidia.com/downloads/jetson-orin-nx-orin-nano-series-thermal-design-guide
If your thermal solution can support the TDP required for your use case without exceeding the Orin SOC Tj in worst case operating conditions and it does not exert negative pressure on the Orin SOC die in any circumstances and the pressure/strain as experienced by the Orin SOC is below the data sheet limit then this is purely your decision/call. Also, keep in mind the temperature cycling effects during the lifetime of your product.
What failure modes would you expect from temperature cycling the product? Any other concern outside of potential TIM pump out and delamination?
Thanks!
At board level warpage and solder joint failures are more common with higher temperature cycling induced stress.
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