PCIE and GPU core suitability

[david166]

I’m new to the Jetson product line and am interested to know if this device is suitable for what I need to do.

I have some extremely high resolution audio ADC (32 bit, 192,000kHz sample rate, 4 audio channels which is a bit clock of 24.576MHz) that I need to apply a really big FIR filter to the audio and pass it back out to a DAC with as minimal latency as possible. I need to then split off the audio in the GPU to run some processing on the audio stream (FFT and other AI related stuff and smart algorithms) that then dynamically updates the FIR filter output (to do funky things like acoustic echo cancellation, voice detection and muting etc). Due to the low latency and high volume of serial data, I am thinking that this might be a candidate for PCIE bus to direct GPU memory sharing that bypasses the CPU.

Is this even possible to do? (Considering the data is serial and would require the GPU to service the data based upon a clock driven interrupt or flag, and would not be able to request the memory from a specific address). Despite the data being serial, it seems well within the scope of capabilities of PCIE bus speeds.

Ive had a look at some of the Jetson projects relating to audio, but they all seem to be USB driver driver through a CPU managed memory architecture.

Any advice or has anyone attempted anything similar with serialized data and PCIE to GPU direct memory and PCIE event driven processing?

[linuxdev]

Not a complete answer, but the integrated GPU (iGPU) is directly wired to the memory controller, and does not use PCI. The memory used is the system memory, not the faster memory you would associate with a discrete GPU (dGPU) on a PCIe bus.

Drivers available for external video cards (GPUs) are problematic. The integrated iGPU drivers will not work for PCIe cards, and so far as I know the dGPU drivers on arm64 architecture were intended for some data warehouse GPUs, and will be problematic installed to a Jetson (I think this is being worked on though, someone else may have an update on that topic).

I/O is going to be a problem. Not necessarily total bandwidth, but variation in latency may be an issue. You might add more information about how your ADC i/o connects. Something like a PCIe FPGA with your ADC on it might be a far better choice since a lot of this could be handled there so far as I/O goes, and then passed back and forth with the iGPU. This might be a reasonable solution if you are able to work with FPGAs.