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Based on the provided information, I’ll try to provide a comprehensive answer.
The issue you’re experiencing is related to the clock signal integrity of the PCIe clock on your self-designed carrier board, specifically with the Jetson Orin NX 16GB and 8GB modules. You’ve performed clock jitter tests on both modules, and the results show that the Jetson Orin NX 8GB meets the test specifications for Gen 1 to 4, while the Jetson Orin NX 16GB fails the Gen 4 clock jitter test.
To understand the differences between the two modules, let’s examine the possible factors that could contribute to this discrepancy:
Hardware differences: The Jetson Orin NX 16GB and 8GB modules might have different hardware configurations, such as variations in the PCB layout, component selection, or manufacturing processes. These differences could affect the signal integrity of the PCIe clock.
Software differences: Although you mentioned that both modules are running JetPack 6.2.1, there might be subtle differences in the software configuration or settings that could impact the PCIe clock signal integrity.
Clock configuration: The clock configuration for the PCIe interface might be different between the two modules. The Jetson Orin NX 16GB might be configured to use a different clock source or clock frequency, which could affect the signal integrity.
To investigate further, I recommend checking the following:
Clock configuration: Verify that the clock configuration for the PCIe interface is the same for both modules. You can check the clock configuration in the device tree or the kernel configuration files.
Hardware design: Review the hardware design of your carrier board to ensure that it meets the requirements for the Jetson Orin NX 16GB module. Check for any differences in the PCB layout, component selection, or manufacturing processes that could affect the signal integrity.
Signal integrity analysis: Perform a detailed signal integrity analysis on the PCIe clock signal for both modules. This will help you identify any differences in the signal characteristics that could be contributing to the clock jitter issue.
Jetson Orin NX documentation: Consult the Jetson Orin NX documentation to see if there are any specific recommendations or guidelines for designing a carrier board that meets the signal integrity requirements for the PCIe interface.
In summary, the differences in clock signal integrity between the Jetson Orin NX 16GB and 8GB modules could be due to a combination of hardware and software factors. By investigating the clock configuration, hardware design, and signal integrity, you should be able to identify the root cause of the issue and make the necessary adjustments to ensure that your carrier board meets the signal integrity requirements for the Jetson Orin NX 16GB module.
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As you mentioned in picture 1 “The Tx test procedures described in this application note are not recommended for Gen4 and up”, how can I ensure GEN4 signal accuracy?
The PCIE0 signal is use for M.2 SSD, when measure the CLK jitter, we need to remove the SSD and insert the Breakout Board to M.2 connector, so we can not apply the patch file.
We use tektronix DPO73304SX, the bandwidth is 33GHz, sample rate is 100GS/s, we used the same test equipment and the same method, the only change is the SOM, I think the scope and probe are not the issue.
