I noticed tx2 PCIE data rate is 5GT/s per lane base on tx2 datasheet. Does it means that transmit direction date rate is 2.5GT/s and receive direction date rate is 2.5GT/s?
Revision 2 is 5GT/s, where TX and RX are each 5GT/s in the PCIe spec. Consider this full duplex. Revision 1 is 2.5GT/s in each direction. When a PCIe slot is marked as “1 lane” it has one TX and one RX at each end of the host-to-endpoint pipe.
Hi linuxdev,
Thanks for you response.Another question. What revision are you talk about? Does it means that revision 2 equal to PCIE GEN 2?
I want to konw data rate about PCIE in each direction in TX2.
The first PCIe which came out was revision 1. Sometimes known as rev. 1, this is 2.5GT/s. Revision 2 only came out later…this is 5GT/s, but older equipment did not support it; even so, a rev. 2 bus can scale back to rev. 1…it is backwards compatible. Similar for rev. 3, which is 8.5GT/s…but the TX2 does not support this…a rev. 3 device would scale back to 5GT/s on the TX2.
The Xavier supports rev. 4, a whopping 16GT/s. There are no devices in the wild yet which are rev. 4, you can’t even buy a rev. 4 bridge without knowing someone. However, as rev. 4 cards show up, the Xavier will have massive throughput.
All PCIe are full duplex. All are that throughput simultaneously in both directions…rev. 2 is 5GT/s send and simultaneously 5GT/s receive. It’s up to drivers to make use of it.