PCIe Gen 2 problem

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX1
1

Hi all,

I have connected the Xilinx Virtex707 FPGA evaluation board to the Jetson TX1 through the PCIe slot.
When the Link speed of the FPGA PCIe block is 2.5 GT/s, everything is OK and the Jetson detects that as PCIe Gen 1.

But when I change the Link speed of the FPGA PCIe block to 5GT/s then Jetson TX1 does not boot and print a non-stop message complaining about pcie interrupt. These are the keywords in the message

“printk message dropped xxx pcie xxx handle_sb_intr xxxx”

only after adding pci=nomsi to the boot arguments, it can boot.

I am wondering how I can resolve this problem.

Thanks

2

But when I change the Link speed of the FPGA PCIe block to 5GT/s
How is the above being done exactly? Are you not setting the Target Link Speed field Link Control-2 register in Root port’s configuration space and going for link retrain?
BTW, pci=nomsi doesn’t enable MSI interrupts and that shouldn’t do anything to link operating at Gen-2.
Is there any limitation from FPGA w.r.t Gen-2 in this case?