PCIe Jetson Xavier


I’m reviewing the excel spreadsheet of the checklist items - in the USB_PEX_UFS tab, in the PCIe section I see you write, for example, UPHY Lanes [5:2] used for 3.3V 4-lane device/connector.
What do you mean 3.3V - the lanes supposed to be standard PCIe, right?

Thank you,

That 3.3V is the voltage level used on device/connector on carrier board of dev kit. For PCIe port itself, the Vtx-dc-cm is 0V ~3.6V per spec.