PCIe marvell 9230 SATA controller

Hi,

I’m trying to get a marvell 9230 SATA controller to work on L4T R28.1

$ uname -a
Linux tegra-ubuntu 4.4.38-tegra #1 SMP PREEMPT Thu Jul 20 00:41:06 PDT 2017 aarch64 aarch64 aarch64 GNU/Linux

The controller is detected by the system:

$ sudo lspci -vvv -s 01:00.0 
01:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9230 PCIe SATA 6Gb/s Controller (rev 11) (prog-if 01 [AHCI 1.0])
	Subsystem: Marvell Technology Group Ltd. 88SE9230 PCIe SATA 6Gb/s Controller
	Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 368
	Region 0: I/O ports at 1020 
	Region 1: I/O ports at 1030 
	Region 2: I/O ports at 1028 
	Region 3: I/O ports at 1034 
	Region 4: I/O ports at 1000 
	Region 5: Memory at 13010000 (32-bit, non-prefetchable) 
	Expansion ROM at 13000000 [disabled] 
	Capabilities: [40] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-
		Address: 00000000  Data: 0000
	Capabilities: [70] Express (v2) Legacy Endpoint, MSI 00
		DevCap:	MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us
			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
		DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [e0] SATA HBA v0.0 BAR4 Offset=00000004
	Capabilities: [100 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		AERCap:	First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-

But none of the drives are detected.
Here’s the kernel log:

$ dmesg | grep -i PCI
[    0.275584] platform 1003000.pcie-controller: domain=ffffffc0fa25be18 allocates as[0]=ffffffc0fa14c4b8
[    0.460859] PCI: CLS 0 bytes, default 128
[    0.499841] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 1, set pcie_lanes = 0x2
[    0.499890] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 2, set pcie_lanes = 0x6
[    0.499937] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 3, set pcie_lanes = 0xe
[    0.499982] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 4, set pcie_lanes = 0x1e
[    0.500027] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 0, set pcie_lanes = 0x1f
[    0.503446] Adding domain pcie-pd to PM domain mc-clk-pd
[    0.508081] tegra-pcie 1003000.pcie-controller: 4x1, 1x1 configuration
[    0.508150] tegra-pcie 1003000.pcie-controller: failed to get PHY: -517
[    0.508176] tegra-pcie 1003000.pcie-controller: failed to get PHYs: -517
[    3.631281] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 1, set pcie_lanes = 0x2
[    3.631300] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 2, set pcie_lanes = 0x6
[    3.631317] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 3, set pcie_lanes = 0xe
[    3.631334] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 4, set pcie_lanes = 0x1e
[    3.631351] tegra21x-padctl-uphy 7009f000.pinctrl: uphy_lane = 0, set pcie_lanes = 0x1f
[    3.637159] tegra-pcie 1003000.pcie-controller: 4x1, 1x1 configuration
[    3.637397] tegra-pcie 1003000.pcie-controller: PCIE: Enable power rails
[    3.638492] tegra-pcie 1003000.pcie-controller: probing port 0, using 4 lanes
[    3.640604] tegra-pcie 1003000.pcie-controller: probing port 1, using 1 lanes
[    4.087572] tegra-pcie 1003000.pcie-controller: link 1 down, retrying
[    4.496064] tegra-pcie 1003000.pcie-controller: link 1 down, retrying
[    4.905951] tegra-pcie 1003000.pcie-controller: link 1 down, retrying
[    4.908002] tegra-pcie 1003000.pcie-controller: link 1 down, ignoring
[    4.908164] tegra-pcie 1003000.pcie-controller: PCI host bridge to bus 0000:00
[    4.908167] pci_bus 0000:00: root bus resource [mem 0x13000000-0x1fffffff]
[    4.908170] pci_bus 0000:00: root bus resource [mem 0x20000000-0x3fffffff pref]
[    4.908173] pci_bus 0000:00: root bus resource [bus 00-ff]
[    4.908176] pci_bus 0000:00: root bus resource [io  0x1000-0xffff]
[    4.908196] pci 0000:00:01.0: [10de:0fae] type 01 class 0x060400
[    4.908270] pci 0000:00:01.0: PME# supported from D0 D1 D2 D3hot D3cold
[    4.908435] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    4.908539] pci 0000:01:00.0: [1b4b:9230] type 00 class 0x010601
[    4.908580] pci 0000:01:00.0: reg 0x10: [io  0x8000-0x8007]
[    4.908593] pci 0000:01:00.0: reg 0x14: [io  0x8040-0x8043]
[    4.908606] pci 0000:01:00.0: reg 0x18: [io  0x8100-0x8107]
[    4.908618] pci 0000:01:00.0: reg 0x1c: [io  0x8140-0x8143]
[    4.908631] pci 0000:01:00.0: reg 0x20: [io  0x800000-0x80001f]
[    4.908644] pci 0000:01:00.0: reg 0x24: [mem 0x00900000-0x009007ff]
[    4.908658] pci 0000:01:00.0: reg 0x30: [mem 0xd0000000-0xd000ffff pref]
[    4.908710] pci 0000:01:00.0: PME# supported from D3hot
[    4.908846] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[    4.908871] pci 0000:00:01.0: BAR 8: assigned [mem 0x13000000-0x130fffff]
[    4.908874] pci 0000:00:01.0: BAR 7: assigned [io  0x1000-0x1fff]
[    4.908879] pci 0000:01:00.0: BAR 6: assigned [mem 0x13000000-0x1300ffff pref]
[    4.908882] pci 0000:01:00.0: BAR 5: assigned [mem 0x13010000-0x130107ff]
[    4.908888] pci 0000:01:00.0: BAR 4: assigned [io  0x1000-0x101f]
[    4.908894] pci 0000:01:00.0: BAR 0: assigned [io  0x1020-0x1027]
[    4.908900] pci 0000:01:00.0: BAR 2: assigned [io  0x1028-0x102f]
[    4.908905] pci 0000:01:00.0: BAR 1: assigned [io  0x1030-0x1033]
[    4.908911] pci 0000:01:00.0: BAR 3: assigned [io  0x1034-0x1037]
[    4.908917] pci 0000:00:01.0: PCI bridge to [bus 01]
[    4.908920] pci 0000:00:01.0:   bridge window [io  0x1000-0x1fff]
[    4.908925] pci 0000:00:01.0:   bridge window [mem 0x13000000-0x130fffff]
[    4.909055] pcieport 0000:00:01.0: Signaling PME through PCIe PME interrupt
[    4.909057] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
[    4.909062] pcie_pme 0000:00:01.0:pcie01: service driver pcie_pme loaded
[    4.909126] aer 0000:00:01.0:pcie02: service driver aer loaded
[    4.909226] tegra-pcie 1003000.pcie-controller: speed change : Gen-1 -> Gen-2

I’ve seen the post from https://devtalk.nvidia.com/default/topic/969972/sata-controller-marvell-9230-doesn-t-work-on-tx1/ - but the OP was using the 3.10 kernel.

It looks to me that there’s no driver loaded - is the driver enabled in the kernel config? If not, what config option should I enable?

$ zcat /proc/config.gz  | grep -i ahci
# CONFIG_SATA_AHCI is not set
# CONFIG_SATA_AHCI_PLATFORM is not set
# CONFIG_AHCI_CEVA is not set
CONFIG_SATA_AHCI_TEGRA=y
# CONFIG_AHCI_TEGRA is not set
# CONFIG_AHCI_QORIQ is not set
# CONFIG_SATA_ACARD_AHCI is not set

Thanks

To answer my own question…

CONFIG_SATA_AHCI = y

did the trick