英伟达团队您好，我们想要测一下pcie眼图，如何配置才能进入pcie的测试模式？

Robotics & Edge Computing Jetson Systems Jetson Thor
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有寄存器或者命令，可以进入该测试模式吗？我们pcie接的是nvme硬盘，还是通过读写硬盘就能准确测试眼图？

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This pdf may contain what you seek.

https://developer.nvidia.com/downloads/assets/embedded/secure/jetson/thor/docs/jetson_thor_tuningguide_da-12308-001.pdf

2.1 Eye Opening Monitor (EOM)
The NVIDIA Jetson Thor Module provides a non-intrusive method of monitoring selected
High-Speed I/O (HSIO) receive signal quality as part of the receiver input logic called the
Eye-Opening Monitor (EOM). This feature is provided by the EOM engine, which is part of
the Thor receiver logic inside the HSIO pad, also known as Unified PHY or UPHY.
2.1.1 EOM Setup
1. Click on the Attachment tab of this PDF (or the paper clip icon, depending on the
Acrobat Reader version).
2. Select the files (EOM_logger.nvpy, uphy_eom.nvsh) and use the Tool Bar options
(Open, Save) to retrieve the document.
3. Rename the file extension from .nvpy to .py and from .nvsh to .sh
4. Copy the two files to the Thor target board ( i.e., /home/nvidia).
5. For quick EOM scanning, type the following:
$ sudo su
/home/nvidia# ./uphy_eom.sh
This lists which ports can be EOM tested and which ports cannot

Pdf includes these attachments:
command_lm.txt
EOM_logger.py
setpci
mv uphy_eom.nvsh uphy_eom.sh
chmod +x setpci

./setpci --help
Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*

General options:
-f              Don't complain if there's nothing to do
-v              Be verbose
-D              List changes, don't commit them
--dumpregs      Dump all known register names and exit

PCI access options:
-A <method>     Use the specified PCI access method (see `-A help' for a list)
-O <par>=<val>  Set PCI access parameter (see `-O help' for a list)
-G              Enable PCI access debugging

Setting commands:
<device>:       -s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]
                -d [<vendor>]:[<device>]
<reg>:          <base>[+<offset>][.(B|W|L)]
<base>:         <address>
                <named-register>
                [E]CAP_<capability-name>
                [E]CAP<capability-number>
<values>:       <value>[,<value>...]
<value>:        <hex>
                <hex>:<mask>
2 Likes
4

In addition to the EOM that @whitesscott mentioned (thank you), there is also a PCIe Lange Margining section in the same Verification Guide.

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