PCIe SATA3 Controller

I’m attempting to connect an SATA3 SSD at a full 6Gbps. Since the native SATA controller on the TX only supports SATA2, I thought I might get the speed I’m after by using an inexpensive PCIe SATA3 controller. Unfortunately, it doesn’t seem to be working.

The manual for this particular device http://www.sybausa.com/index.php?route=product/product/download&download_id=761 claims that kernels all the way back to 2.6.19 should support its chipset out of the box when “ata_generic.all_generic_ide=1” is added to the boot .conf file, but that didn’t seem to have any effect when added to the APPEND line of the default /boot/extlinux/extlinux.conf

lspci -vvv seems to correct identify the device and applies the drivers that I would expect:

00:01.0 PCI bridge: NVIDIA Corporation Device 0fae (rev a1) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	I/O behind bridge: 00001000-00001fff
	Memory behind bridge: 13000000-130fffff
	Prefetchable memory behind bridge: 0000000020000000-00000000200fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity+ SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Subsystem: NVIDIA Corporation Device 0000
	Capabilities: [48] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [50] MSI: Enable- Count=1/2 Maskable- 64bit+
		Address: 0000000000000000  Data: 0000
	Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
		Mapping Address Base: 00000000fee00000
	Capabilities: [80] Express (v2) Root Port (Slot+), MSI 00
		DevCap:	MaxPayload 128 bytes, PhantFunc 0
			ExtTag+ RBE+
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Exit Latency L0s <512ns, L1 <4us
			ClockPM- Surprise- LLActRep+ BwNot+
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Off, PwrInd On, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
			Changed: MRL- PresDet+ LinkState+
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
		DevCap2: Completion Timeout: Range AB, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF Disabled ARIFwd-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [100 v0] #00
	Capabilities: [140 v1] L1 PM Substates
		L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
			  PortCommonModeRestoreTime=30us PortTPowerOnTime=70us
	Kernel driver in use: pcieport

01:00.0 SATA controller: ASMedia Technology Inc. ASM1062 Serial ATA Controller (rev 02) (prog-if 01 [AHCI 1.0])
	Subsystem: ASMedia Technology Inc. Device 1060
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 547
	Region 0: I/O ports at 1020 
	Region 1: I/O ports at 1030 
	Region 2: I/O ports at 1028 
	Region 3: I/O ports at 1034 
	Region 4: I/O ports at 1000 
	Region 5: Memory at 13000000 (32-bit, non-prefetchable) 
	[virtual] Expansion ROM at 20000000 [disabled] 
	Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit-
		Address: 7ef8a000  Data: 0000
	Capabilities: [78] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [80] Express (v2) Legacy Endpoint, MSI 00
		DevCap:	MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #1, Speed 5GT/s, Width x1, ASPM not supported, Exit Latency L0s unlimited, L1 <2us
			ClockPM- Surprise- LLActRep- BwNot-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
		DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR-, OBFF Not Supported
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [100 v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed- WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending- InProgress-
	Kernel driver in use: ahci

But if I’m interpreting dmesg correctly, the TX was never able to successfully communicate with the controller (or its attached drive) no matter how far back it throttled its attempted connection speed:

[    9.500651] ALSA device list:
[    9.505186]   #0: HDA NVIDIA Tegra at 0x70038000 irq 113
[   11.510608] ata2.00: qc timeout (cmd 0xec)
[   11.516316] ata2.00: failed to IDENTIFY (I/O error, err_mask=0x4)
[   12.070614] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
[   12.079979] mc-err: [mcerr] (0) csw_afiw: EMEM address decode error
[   12.087926] mc-err: [mcerr]   status = 0x20010031; addr = 0x7ef8a000
[   12.095959] mc-err: [mcerr]   secure: no, access-type: write, SMMU fault: none
[   22.070606] ata2.00: qc timeout (cmd 0xec)
[   22.076407] ata2.00: failed to IDENTIFY (I/O error, err_mask=0x4)
[   22.084238] ata2: limiting SATA link speed to 3.0 Gbps
[   22.640603] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 320)
[   22.650043] mc-err: [mcerr] (0) csw_afiw: EMEM address decode error
[   22.658123] mc-err: [mcerr]   status = 0x20010031; addr = 0x7ef8a000
[   22.666299] mc-err: [mcerr]   secure: no, access-type: write, SMMU fault: none
[   52.640598] ata2.00: qc timeout (cmd 0xec)
[   52.646543] ata2.00: failed to IDENTIFY (I/O error, err_mask=0x4)
[   53.200674] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 320)
[   53.208818] md: Waiting for all devices to be available before autodetect

Although these failures only occur with the SSD connected, no entry for my ssd appeared within /dev.
Does anyone have any insight on what might be going wrong here?

The PCIe information basically shows the SATA card is correctly detected and working so far as PCIe communications go. The failure is likely independent of the PCIe bus (there could still be controller incompatibilities…this includes knowing which kernel config is used for that SATA chipset and checking if the feature is enabled…desktops add such support by default, the same may not be true of L4T embedded systems).

Have you tested the SSD on the built-in SATA port? Despite only running at SATA2 speeds, should the same error occur on both the PCIe card and the integrated SATA you would know the issue tracks the SSD instead of the PCIe controller. Lack of failure on the integrated SATA port would tend to point towards the driver of the SATA controller within the PCIe card.

In the past there have been problems specific to individual SSD drives. You will want to post exact model information for the SSD being used.

Thanks for the quick reply!
The SSD is a 2TB Samsung 850 EVO (http://www.samsung.com/us/business/computing/solid-state-drives/MZ-75E2T0B/AM), and it does work without issue with it’s connected to the built-in connector (at SATA2 speeds). I’ve also tried swapping out the SATA cables and even the SATA3 controller board (I got a few of them) to try and rule out bad hardware there.

If this is a driver issue, then it sounds like (from this thread: https://devtalk.nvidia.com/default/topic/906942/failed-to-compile-kernel-module-gcc-cannot-recognize-aarch64-option-mgeneral-regs-only-/) my next step should be to get the aarch64 build tools set up so I can cross-compile the kernel. Currently running ‘sudo make modules_prepare’ down in the kernel headers directory is giving me that "unrecognized command-line option -mgeneral-regs-only" error.

Is there anything else I might want to take a look at?

Although I have not checked on which driver is used for your PCIe SATA card, cross-compile of a suitable kernel module is very likely what is required (implying the cross-compile tools you mentioned).

Several threads have mentioned some minor edits required for compile to succeed. The required edits change dependent upon which compiler tools you use. This thread mentions required edits:
https://devtalk.nvidia.com/default/topic/894945/jetson-tx1/jetson-tx1/11