I have connected to the Jetson TX2 development kit a PCIe card with 4 serial RS-485 ports, based on chip EXAR XR17V354.
The board is properly detected by the kernel as per lspci command:
01:00.0 Serial controller: Exar Corp. Device 0354 (rev 03) (prog-if 02 )
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 381
Region 0: Memory at 40100000 (32-bit, non-prefetchable) [size=16K]
Capabilities:  MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
When it comes to receive interrupts, the driver gets several IRQs even if the register on the device responsible for the irq emission is cleared.
Few instants later, when it should be the time to receive new interrupts, the ISR isn’t triggered anymore.
This behavior is not present on X86 CPU.
I tried to play with interrupt flags and I have found that if I try to force edge interrupts the kernel reply with this message:
genirq: Flags mismatch irq 381. 00000081 (xrserial) vs. 00000084 (PCIE)
On X86 the message is different:
genirq: Flags mismatch irq 17. 00000081 (xrserial) vs. 00000080 (snd_intel8x0)
So on NVidia CPU interrupts related to PCIe are level HIGH, on X86 are NONE.
Could be this the reason why I receive spurious interrupts ?
How to configure the PCIe properly ?