PCIE1 is disabled in plugin manager on NX module?

In tegra194-plugin-manager-p3668.dtsi, I see:

		fragement-tegra-pcie-c4-dis {
			ids = ">=3449-0000-000";
			override@0 {
				target = <&{/pcie@14160000}>;
				_overlay_ {
					status = "disabled";

But in tegra194-p3668-common.dtsi:

	pcie@14160000 {
		status = "okay";

		nvidia,pex-wake = <&tegra_main_gpio TEGRA194_MAIN_GPIO(L, 2)
		vddio-pex-ctl-supply = <&p3668_spmic_sd3>;
		nvidia,disable-aspm-states = <0xf>;
		nvidia,max-speed = <3>;

		num-lanes = <1>;
		phys = <&p2u_11>;
		phy-names = "pcie-p2u-0";

It seems the two are conflict with each other, which one will have higher priority? Or they work at different stage? Such as PCIE1 is disabled at CBoot stage, but enabled latter?


The plugin-manager will take effect.

So, that mean the PCIE1 wouldn’t work on the devkit by default?


NX devkit has difference from Nano devkit… that is why some interfaces would get disabled.

@WayneWWW, I see the device manager also set the C5 to lane 1, though it support x4, right? May I change this to 4 to enable x4 for NVMe?


What kind of carrier board is in use here? If you are using devkit, no matter it is nano or nx, the plugin-manager shall handle it.

Yes, I know device manager will judge the board type and do something. It’s behavior is controlled by the device manner DTS setting, right? And there are 4 lanes pcie to nvme connector, right? But in the device manger dtsi file, lane-num is setting to 1, so does it mean only 1 Lane is enabled for nvme?


  1. Clarify what kind of carrier board is in use first. If this is devkit, then everything would follow the design guide of NX board.

  2. If this is your board, then you need to modify the lane # to match your board.

The board is devkit, the schematic shows 4 lanes to the M2 M connector. And in the official plugin manger file mentioned in my question, num-lane is set to 1. Is it mean only 1 lane used by default ? May I change it to 4 to go 4 lane?



M.2 M connector is controller C5. But your comment #1 is for C4…

Yes, C4 is confirmed. And I find there some question about C5, they are just in the same file.


P3449 is Nano devkit. Not NX…

Won’t the 3668 >= 3449 for the ids comparing? For my understanding, 3668 >= 3449, so this will applied to NX too. Please correct me.


No, the >= only compares the fab id in the last 3 digits. The prefix board id needs to be matched to pass “>=”. Your another topic for the “>=” logic in cboot will help you understand it.

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