PGI OpenACC nvcc compiler flags (or cuda flags)


As I understood PGI OpenACC performs source-to-source translation and obtains cuda which is further compiled by nvcc. If yes, how could I see exactly which compiler flags are applied to nvcc and how could I control them?


Hi Jasmine,

The current default is to perform a source translation to either optimized low level CUDA C for NVIDIA targets or OpenCL for AMD targets. However, we don’t invoke nvcc driver directly, rather the lower level device compilers. In both cases, you can inspect the intermediary device files via the “-ta” flag’s “keep” sub-option.

While you can not directly modify the flags passed to the back-end compilers. You can effect what is passed using the “-ta” sub-options. The exact sub-options does vary from release to release so please see “pgfortran -ta -help” or “pgcc -ta -help” to see the exact options available.

Hope this helps,

Assuming I add O0 (optimization level) flag at -ta list. Shouldn’t this optimization level be applied to cuda compilation phase?

I’m asking since I observed that when using different optimization levels inside “-ta” you obtain different cuda files. And this is associated with pgi phase when cuda code is generated not with cuda code compilation.


Hi Jasmine,

While not documented or officially supported, you can effect the optimization level of the back-end device compiler by passing in “O0”, “O1”, “O2”, or “O3” by setting “-ta=tesla:O0”, (the default being “O2”). However, this is experimental and will change soon.

In the near future, we plan on having the host command line opt level passed to the back-end device compiler. ex. setting “-O0 -acc” would pass -O0 to both the host and device compilers.

  • Mat

Thank you, Mat