PicoEVB M.2 FPGA on Jetson TX2


I am trying to work with the PicoEVB M.2 FPGA (https://picoevb.com/) on the Jetson TX2, but for some reason the Jetson doesn’t recognize the PCIe device. I know that by default the M.2 interface is disabled in the TX2, so I already changed ODMDATA=0x90000 in the p2771-0000.conf.common file and reflashed the TX2. I have verified that the configuration was applied correctly by running:

ll /proc/device-tree/chosen/plugin-manager/odm-data/
total 0
drwxr-xr-x 2 root root 0 oct 25 07:36 ./
drwxr-xr-x 6 root root 0 oct 25 07:36 ../
-r--r--r-- 1 root root 4 oct 25 07:36 android-build
-r--r--r-- 1 root root 4 oct 25 07:36 disable-pmic-wdt
-r--r--r-- 1 root root 4 oct 25 07:36 disable-sdmmc-hwcq
-r--r--r-- 1 root root 4 oct 25 07:36 disable-tegra-wdt
-r--r--r-- 1 root root 4 oct 25 07:36 enable-debug-console
-r--r--r-- 1 root root 4 oct 25 07:36 enable-denver-wdt
-r--r--r-- 1 root root 4 oct 25 07:36 enable-pcie-on-uphy-lane0
-r--r--r-- 1 root root 4 oct 25 07:36 enable-pcie-on-uphy-lane1
-r--r--r-- 1 root root 4 oct 25 07:36 enable-pcie-on-uphy-lane2
-r--r--r-- 1 root root 4 oct 25 07:36 enable-pcie-on-uphy-lane4
-r--r--r-- 1 root root 4 oct 25 07:36 enable-sata-on-uphy-lane5
-r--r--r-- 1 root root 9 oct 25 07:36 name
-r--r--r-- 1 root root 4 oct 25 07:36 no-battery
-r--r--r-- 1 root root 4 oct 25 07:36 normal-flashed

I also connected an Intel 3165 wireless card to the M.2 interface and then ran lspci:

00:03.0 PCI bridge: NVIDIA Corporation Device 10e6 (rev a1)
01:00.0 Network controller: Intel Corporation Wireless 3165 (rev ff)

So apparently the configuration was applied correctly and the M.2 interface is working. However, when I connect the PicoEVB FPGA and run lspci I don’t get any information. The PicoEVB has a FTDI USB chip that acts as JTAG interface, and I am able to see it:

lsusb | grep 0403:6015
Bus 001 Device 002: ID 0403:6015 Future Technology Devices International, Ltd Bridge(I2C/SPI/UART/FIFO)

But with lspci I have no luck, zero devices displayed.

When I connect the PicoEVB to the M.2 interface of my Ubuntu laptop and then run lspci I get the expected result:

lspci | grep Xilinx
Serial controller: Xilinx Corporation Device 7021

So I know the PicoEVB is working correctly. What can I do to make it work with the TX2?

Best regards

All your experiments suggest that there shouldn’t be any reason why M.2 Key-E won’t work.
I’m just wondering if there is any condition that if the USB interface is up, then, PCIe won’t work or something like that? I mean do you see both the PCIe interface and USB interface when the same card is connected to your Ubuntu machine?
Also, are there any assumptions on the REFCLK? I mean does this PicoEVB card take REFCLK coming from the root port (i.e. M.2 Key-E slot) or uses its internally generated REFCLK?
Also, what is the initialization time required by this device? Can you try increasing the link timeout time and see if that solves the issue?
There is a define “TEGRA_PCIE_LINKUP_TIMEOUT” in pci-tegra.c file which is currently set to 200. Please increase it to 1000 and see if that works.

Hi vidyas,

Thanks for the answer. Yes, in my Ubuntu machine I can see both devices at the same time, running lspci and lsusb. About REFCLK I am not sure, I need to look for that information. Related to that, last week I wrote to the manufacturer because the PicoEVB has 3 LEDs and when the board is working normally (with the factory configuration) one of the LEDs should be blinking. However, in my case the 3 LEDs are always ON. This was his answer:

“With the factory bitstream, one of the LEDs indicates PCIe status. If the LED is on solid, it means the TX2 is holding PicoEVB in reset (its asserting PERST signal low).”

Do you have an idea of what can be causing this behavior?

I will try your suggestion about TEGRA_PCIE_LINKUP_TIMEOUT and then I will let you know the results.

Best regards


I increased TEGRA_PCIE_LINKUP_TIMEOUT to 1000 in pci-tegra.c, recompiled everything and flashed the board again. The result is the same, the 3 LEDs always ON and no results from lspci.

You may have to connect a PCIe protocol analyzer to find out what is happening over the bus.


I would like to do the same thing. Was there a resolution to this?

Did you try to represent the SPI controller in the picoevb using devicetree and the xilinx driver? If so, would you be willing to share an example of your devicetree?

Thank you