I had a previous post where I was helped with setting up pinmux assignments for a Jetson Orin Nano Developer Kit. We had success the first time, but we had to re-flash the device and we wanted to assign more pins as outputs. We tried assigning all the GPIO pins as outputs, and attempted to assign some of the other pins as outputs as well. However, when we attempt to flash through Linux for Tegra, we are getting an error where it does not finish the flash, and the pins are no longer outputting as needed. My question is multipart:
1: How do we get the Linux for Tegra to flash for the pinmux assignments?
2: Are we able to assign non-GPIO, such as the UART1_RTS or SPI1_SCK pins to operate like GPIO pins as outputs? If not, the board just seems very limited compared to the Jetson Nano which lacks the processing power we want.
We were able to get the previous pinmux set to flash were we only set the 6 GPIO pins to output, but we are needing 9 outputs and are trying to utilize some of the other pins.
here’re general flows to apply your customize pinmux configuration.
(1) Generate device tree files and name them as pinmux.dtsi and gpio.dtsi (remember to modify the #include in pinmux.dtsi for gpio.dtsi)
(2) Put pinmux/gpio device trees to correct path pinmux.dtsi in <Linux_for_Tegra>/bootloader/generic/BCT/ gpio.dtsi in <Linux_for_Tegra>/bootloader/
(3) Modify the following line in <Linux_for_Tegra>/p3701.conf.common - PINMUX_CONFIG="tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi"; + PINMUX_CONFIG="pinmux.dtsi";
(4) Full-flash the board to apply the pinmux change.
(Optional-5) Run the following commands to control the GPIO pin.
$ sudo su
# gpioset --mode=wait `gpiofind "PR.00"`=1
regrading to… such as the UART1_RTS or SPI1_SCK pins to operate like GPIO
there’s [Customer Usage] in the pinmux spreadsheets, please toggle the selection as GPIO pin.
We tried running the code snippet you put and nothing happens. we also tried selecting gpio on the drop down under customer usage and we are still not getting any outputs from those pins.
let’s taking UART1_RTS/ GPIO3_PR.04 as an example,
you may examine gpio-default.dtsi file which generated by the pinmux configuration file lists.
please check gpio@2200000 field for the default GPIO pin config.
please also booting into linux, running with gpioinfo gpiochip0| grep PR.04 for checking.
besides, please try dump the register to confirm its values.
here’s an example,
as mentioned by Chapter [4.1 G3 PAD Control Registers] in Orin TRM.
re-cap as below.
The G3 PAD Control Registers are collectively called PADCTL_A0 in the System Address Map.
according to address map, PADCTL_A0, address start = 0x02430000.
according to register description, PADCTL_G3_UART1_RTS_0, Offset: 0x98,
hence,
UART1_RTS register address = 0x02430000 + 0x98 =0x02430098
you may running with below to dump its value for confirmation,
for instance, $ sudo busybox devmem 0x02430098
you may see-also similar discussion thread, such as Topic 231102 for reference.