Pinmuxing for DDR3L

We are designing a product that uses the Jetson platform as a reference. The schematic for the Jetson pin swaps Data bits within bytes and Address and control between themselves.

The reference design also shows this is “DRAM pin multiplexing option #14”. The customer pin mxu tool does not allow us to reflect this option within our pin mux.

  1. Why not?
  2. Is there another “customer” pin mux available with “DRAM pin multiplexing option #14” already incorporated?

Thanks in Advance

The interface design guide have description about the DRAM pin multiplexing option for different DRAM config and placement.
This isn’t need software config so it wasn’t put in pinmux table
Please following the reference design, The memory tuning may need a lot work if it is different.