Using PLL multiplier and PLL pre/post dividers:
MCLK multiplier = PLL multiplier / PLL pre-divider / PLL post-divider
pixel_clk_hz = MCLK × MCLK multiplier
For example:
MCLK = 24MHz
PLL multiplier = 30
PLL pre-divider = 3
PLL post-divider = 3
Then:
MCLK multiplier = 30 / 3 / 3 = 6.67
pixel_clk_hz = 24000000 × 6.67 = 160000000
Using sensor CSI lane output rate:
pixel_clk_hz = sensor data rate per lane (Mbps) * number of lanes / bits per pixel
For example:
Sensor data rate = 891 Mbps (per lane)
Number of lanes = 4
Bits per pixel = 10
Then pixel_clk_hz = 891 Mbps × 4 / 10 = 356400000
Using frame size and frame rate
pixel_clk_hz = sensor output size × frame rate
The above is the method for calculating pix frequency. I have a few questions:
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pixel_clk_hz = sensor data rate per lane (Mbps) * number of lanes / bits per pixel
Does the sensor data rate per lane represent the speed of the channel?
Depending on the version, the maximum speed of the standard CSI lane channel is 1.5Gbps or 2.5Gbps/lane.Where can I obtain the sensor data rate per lane (Mbps) value if I want to calculate pixel_clk_hz?
Sensor output size = 2200 × 1125
(actual output size 1920 × 1080)
Frame rate = 30 frames/second
pixel_clk_hz = 2200 × 1125 × 30 = 74250000
My camera resolution is 960 * 960 now, how should I confirm the sensor output size of the camera?