pixel_clk_hz DTB calculation

Hi all,

We have developed a lot of camera drivers for the Jetson platforms, we have noticed something interesting related to the pixel_clk_hz DTB property calculation, If we calculate the value as width x height x framerate (taking in consideration blanking as you have on the camera programming guide Sensor Pixel Clock section) we have not been able to get the drivers working and we get some issues related to the MIPI.

In order to get the drivers working we need to increase that pixel_clk_hz value x10, Do you know why we need to use a bigger value than the calculated?

-Adrian

Does your design with FPGA/GMSL/SER/DSER ?

You can add “serdes_pix_clk_hz”

Output clock rate for the serializer/deserializer (GMSL or FPD link), in Hertz. Required only for camera modules that use SerDes.
For more information, see SerDes Pixel Clock.

Hi ShaneCCC,

We are not using GMSL, it is a common MIPI camera.

That is why we are using pixel_clk_hz instead serdes_pix_clk_hz.

-Adrian

Have a reference to below doc to check your configure without problem.

https://docs.nvidia.com/jetson/l4t/Tegra%20Linux%20Driver%20Package%20Development%20Guide/camera_sensor_prog.html#wwpID0E0J10HA