I’m trying to develop a custom carrier board to the AGX Xavier SoM.
I’m looking for a detailed power down sequence on both the evaluation board and the Xavier spec.
The power down signal that is created on the MCU and initiate the power down sequence is missing from the signal diagram (Power Button ?).
On Power up sequence, It is not clear what is the pulse width of Power Button see figure1 attached
The attached signal diagram is timeless figure2 – it is not clear what is the time interval between each segments
There are some discrepancies between both evaluation board and the Xavier spec e.g. on Figure 8. Power Down Sequence (Controlled Case) of Jetson_AGX_Xavier_Series_OEM_Product_Design_Guide.pdf one can see the MODULE_POWER_ON is de-asserted early, right after SYS_RESET_N is de-asserted, also VDDIN_PWR_BAD_N is de-asserted right after SYS_RESET_N is de-asserted, then SYS_VIN_HV and SYS_VIN_MV are slowly decreased. see figure3
However this same power down sequence is dipicted in a different way on 2.3.2 Power Down signal diagram on JetsonXavierSOMDataSheet_v0 9.pdf
In 2.3.2 one can see the MODULE_POWER_ON is de-asserted very late, apparently after Jetson Xavier Module Power. Jetson Xavier Module Power is missing from the first signal diagram.
VDDIN_PWR_BAD_N , SYS_VIN_HV and SYS_VIN_MV remain high and are not affected from the power down.
See figure3 and compare to figure2
- when pressing for a shut down on the XAVIER EVB On/OFF push Botton, What signals are indicating to the SoM that power off process begin?