Hi guys,
I read in the design guide that for 5V design with TK1, it needs a power monitor (page 18).
I am curious to know why it is recommanded for 5V design and not for 12V ones ?
Moreover, why are the nets not corresponding to the monitored module ? (for example VDD_SYS_CPU_P/M with USB module) ?
It would be surprising if the PMIC doesn’t handle overcurrent on GPU/CPU supplies by itself…
Any suggestions ? :)
Have a nice day.
I’m only guessing here, but I suspect the reason is due to the difference between an SoC regulator which has the ability to correctly regulate over a large range of voltages with 12V in, versus 5V being used directly with components which need a narrow tolerance. Simply put, I’m guessing that directly using 5V may behave badly if the voltage drops even a small amount, versus 12V not caring because it has a regulator which tolerates a wide range.
The 3.3v and 5v are main power for system
For the 12v power input design, there is a pre-regulator to generate 3.3v and 5v power.
For the 5v power input design, 5v is direct supply to PMIC or other device(USB,MDM). the drop on 5v may below a acceptable level for them
PMIC can monitor the current of CPU/GPU/Core and handle them
There should be some error on the net name of figure 8.
SW could limit CPU/GPU/EMC clock if the overcurrent happen on the module
Thanks all
@edli1983 : 5V_SYS in fact is used for PMIC USB, MDM, SATA & audio codec powering.
So it would be more efficient to monitor the 5V input of the design I think ;).