# Problem with Shift Left Can anyone help?

**URL:** <https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729>\
**Category:** CUDA Programming and Performance\
**Created:** [May 27, 2009, 2:36am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729 "2009-05-27T02:36:46Z")\
**Posts on this page:** 5\
**Page:** 1

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**Author:** ![dcbarton](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@dcbarton](https://forums.developer.nvidia.com/u/dcbarton)\
**Post date:** [May 27, 2009, 2:36am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729/1 "2009-05-27T02:36:46Z")

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The following code usually matches the emulator, but not always. The emulator is always correct:

int x = somevalue;// pos or neg  
y = x \<\< 6;

Under what conditions does gpu SAL not match cpu SAL? It’s very rare, but they do not always match and it’s killing me. Is is an overflow thing?

Thanks to all.

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**Author:** ![SPWorley](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@SPWorley](https://forums.developer.nvidia.com/u/SPWorley)\
**Post date:** [May 27, 2009, 2:56am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729/2 "2009-05-27T02:56:08Z")

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With a lot of experience in hashing, random number generation, and encryption, I use bitlevel ops intensely constantly. I’ve never seen any variation from the CPU.

A common programmer error with RIGHT shifts is to forget that the behavior differs with signed and unsigned integers and that can be a coding gotcha if you miss it. But left shifts are left shifts.

Post a small test program that fails and we can try it out.

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**Author:** ![Sarnath](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/sarnath/32/9742_2.png) [@Sarnath](https://forums.developer.nvidia.com/u/Sarnath)\
**Post date:** [May 27, 2009, 4:51am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729/3 "2009-05-27T04:51:15Z")

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I also suspect the sign thing…

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**Author:** ![wumpus](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/wumpus/32/12040_2.png) [@wumpus](https://forums.developer.nvidia.com/u/wumpus)\
**Post date:** [May 27, 2009, 10:15am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729/4 "2009-05-27T10:15:44Z")

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> [@](#):
>
> I also suspect the sign thing…

Also, if the shift value is more than 31 or less than 0 you might run into undefined, implementation specific behaviour

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**Author:** ![Nico](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@Nico](https://forums.developer.nvidia.com/u/Nico)\
**Post date:** [May 27, 2009, 10:46am UTC](https://forums.developer.nvidia.com/t/problem-with-shift-left-can-anyone-help/9729/5 "2009-05-27T10:46:26Z")

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> [@](#):
>
> Also, if the shift value is more than 31 or less than 0 you might run into undefined, implementation specific behaviour

I had a quick look at the ptx documentation (PTX ISA Version 1.4 p.77) and found the following:

“Shift amounts greater than the register width N are clamped to N.”

N.